#include <sbi/sbi_types.h>
-int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id);
+int plic_warm_irqchip_init(int m_cntx_id, int s_cntx_id);
-int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count);
+int plic_cold_irqchip_init(unsigned long base, u32 num_sources);
void plic_set_thresh(u32 cntxid, u32 val);
{
u32 hartid = current_hartid();
- return plic_warm_irqchip_init(hartid,
- plic_hartid2context[hartid][0],
+ return plic_warm_irqchip_init(plic_hartid2context[hartid][0],
plic_hartid2context[hartid][1]);
}
const struct fdt_match *match)
{
int rc;
- u32 max_hartid;
struct platform_plic_data plic;
- rc = fdt_parse_max_hart_id(fdt, &max_hartid);
- if (rc)
- return rc;
-
rc = fdt_parse_plic_node(fdt, nodeoff, &plic);
if (rc)
return rc;
- rc = plic_cold_irqchip_init(plic.addr, plic.num_src, max_hartid + 1);
+ rc = plic_cold_irqchip_init(plic.addr, plic.num_src);
if (rc)
return rc;
#define PLIC_CONTEXT_BASE 0x200000
#define PLIC_CONTEXT_STRIDE 0x1000
-static u32 plic_hart_count;
static u32 plic_num_sources;
static volatile void *plic_base;
writel(val, plic_ie + word_index * 4);
}
-int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
+int plic_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
{
size_t i, ie_words = plic_num_sources / 32 + 1;
- if (plic_hart_count <= target_hart)
- return -1;
-
/* By default, disable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
return 0;
}
-int plic_cold_irqchip_init(unsigned long base, u32 num_sources, u32 hart_count)
+int plic_cold_irqchip_init(unsigned long base, u32 num_sources)
{
int i;
- plic_hart_count = hart_count;
plic_num_sources = num_sources;
plic_base = (void *)base;
if (cold_boot) {
ret = plic_cold_irqchip_init(AE350_PLIC_ADDR,
- AE350_PLIC_NUM_SOURCES,
- AE350_HART_COUNT);
+ AE350_PLIC_NUM_SOURCES);
if (ret)
return ret;
}
- return plic_warm_irqchip_init(hartid, 2 * hartid, 2 * hartid + 1);
+ return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
}
/* Initialize IPI for current HART. */
ARIANE_UART_REG_WIDTH);
}
-static int plic_ariane_warm_irqchip_init(u32 target_hart,
- int m_cntx_id, int s_cntx_id)
+static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
{
size_t i, ie_words = ARIANE_PLIC_NUM_SOURCES / 32 + 1;
- if (ARIANE_HART_COUNT <= target_hart)
- return -1;
/* By default, enable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
int ret;
if (cold_boot) {
- ret = plic_cold_irqchip_init(ARIANE_PLIC_ADDR,
- ARIANE_PLIC_NUM_SOURCES,
+ ret = plic_cold_irqchip_init(ARIANE_PLIC_NUM_SOURCES,
ARIANE_HART_COUNT);
if (ret)
return ret;
}
- return plic_ariane_warm_irqchip_init(hartid,
- 2 * hartid, 2 * hartid + 1);
+ return plic_ariane_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
}
/*
OPENPITON_DEFAULT_UART_REG_WIDTH);
}
-static int plic_openpiton_warm_irqchip_init(u32 target_hart,
- int m_cntx_id, int s_cntx_id)
+static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
{
size_t i, ie_words = plic.num_src / 32 + 1;
- if (target_hart >= OPENPITON_DEFAULT_HART_COUNT)
- return -1;
/* By default, enable all IRQs for M-mode of target HART */
if (m_cntx_id > -1) {
for (i = 0; i < ie_words; i++)
if (cold_boot) {
ret = plic_cold_irqchip_init(plic.addr,
- plic.num_src,
- OPENPITON_DEFAULT_HART_COUNT);
+ plic.num_src);
if (ret)
return ret;
}
- return plic_openpiton_warm_irqchip_init(hartid,
- 2 * hartid, 2 * hartid + 1);
+ return plic_openpiton_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
}
/*
if (cold_boot) {
rc = plic_cold_irqchip_init(K210_PLIC_BASE_ADDR,
- K210_PLIC_NUM_SOURCES,
- K210_HART_COUNT);
+ K210_PLIC_NUM_SOURCES);
if (rc)
return rc;
}
- return plic_warm_irqchip_init(hartid, hartid * 2, hartid * 2 + 1);
+ return plic_warm_irqchip_init(hartid * 2, hartid * 2 + 1);
}
static int k210_ipi_init(bool cold_boot)
if (cold_boot) {
rc = plic_cold_irqchip_init(UX600_PLIC_ADDR,
- UX600_PLIC_NUM_SOURCES,
- UX600_HART_COUNT);
+ UX600_PLIC_NUM_SOURCES);
if (rc)
return rc;
}
- return plic_warm_irqchip_init(hartid, (hartid) ? (2 * hartid - 1) : 0,
+ return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
(hartid) ? (2 * hartid) : -1);
}
if (cold_boot) {
rc = plic_cold_irqchip_init(FU540_PLIC_ADDR,
- FU540_PLIC_NUM_SOURCES,
- FU540_HART_COUNT);
+ FU540_PLIC_NUM_SOURCES);
if (rc)
return rc;
}
- return plic_warm_irqchip_init(hartid, (hartid) ? (2 * hartid - 1) : 0,
+ return plic_warm_irqchip_init((hartid) ? (2 * hartid - 1) : 0,
(hartid) ? (2 * hartid) : -1);
}
/* Example if the generic PLIC driver is used */
if (cold_boot) {
ret = plic_cold_irqchip_init(PLATFORM_PLIC_ADDR,
- PLATFORM_PLIC_NUM_SOURCES,
- PLATFORM_HART_COUNT);
+ PLATFORM_PLIC_NUM_SOURCES);
if (ret)
return ret;
}
- return plic_warm_irqchip_init(hartid, 2 * hartid, 2 * hartid + 1);
+ return plic_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
}
/*