(ANDPSrr (COPY_TO_REGCLASS FR128:$src1, VR128),
(COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
-def : Pat<(and FR128:$src1, FR128:$src2),
- (COPY_TO_REGCLASS
- (ANDPSrr (COPY_TO_REGCLASS FR128:$src1, VR128),
- (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
-
def : Pat<(X86for FR128:$src1, (memopf128 addr:$src2)),
(COPY_TO_REGCLASS
(ORPSrm (COPY_TO_REGCLASS FR128:$src1, VR128), f128mem:$src2),
(ORPSrr (COPY_TO_REGCLASS FR128:$src1, VR128),
(COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
-def : Pat<(or FR128:$src1, FR128:$src2),
- (COPY_TO_REGCLASS
- (ORPSrr (COPY_TO_REGCLASS FR128:$src1, VR128),
- (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
-
def : Pat<(X86fxor FR128:$src1, (memopf128 addr:$src2)),
(COPY_TO_REGCLASS
(XORPSrm (COPY_TO_REGCLASS FR128:$src1, VR128), f128mem:$src2),
(XORPSrr (COPY_TO_REGCLASS FR128:$src1, VR128),
(COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
-def : Pat<(xor FR128:$src1, FR128:$src2),
- (COPY_TO_REGCLASS
- (XORPSrr (COPY_TO_REGCLASS FR128:$src1, VR128),
- (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
-
//===----------------------------------------------------------------------===//
// GFNI instructions
//===----------------------------------------------------------------------===//
def : Pat<(v2f64 (bitconvert (v8i16 VR128:$src))), (v2f64 VR128:$src)>;
def : Pat<(v2f64 (bitconvert (v16i8 VR128:$src))), (v2f64 VR128:$src)>;
def : Pat<(v2f64 (bitconvert (v4f32 VR128:$src))), (v2f64 VR128:$src)>;
-def : Pat<(f128 (bitconvert (i128 FR128:$src))), (f128 FR128:$src)>;
-def : Pat<(i128 (bitconvert (f128 FR128:$src))), (i128 FR128:$src)>;
// Bitcasts between 256-bit vector types. Return the original type since
// no instruction is needed for the conversion
def FR64 : RegisterClass<"X86", [f64], 64, (add FR32)>;
-def FR128 : RegisterClass<"X86", [i128, f128], 128, (add FR32)>;
+def FR128 : RegisterClass<"X86", [f128], 128, (add FR32)>;
// FIXME: This sets up the floating point register files as though they are f64