dEQP-VK.mesh_shader.ext.query.all_queries.triangles.reset_after.copy.no_wait.draw.64bit.with_availability.no_blocks.task_mesh.inside_rp.multi_view.with_secondary
dEQP-VK.mesh_shader.ext.query.all_queries.triangles.reset_after.copy.wait.draw.64bit.with_availability.multiple_blocks.task_mesh.include_rp.single_view.only_primary
dEQP-VK.mesh_shader.ext.query.mesh_invs_query.triangles.reset_before.copy.no_wait.indirect_draw.32bit.no_availability.single_block.task_mesh.inside_rp.single_view.with_secondary
-dEQP-VK.pipeline.fast_linked_library.extended_dynamic_state.before_good_static.topology_line_geom
-dEQP-VK.pipeline.monolithic.extended_dynamic_state.between_pipelines.topology_line_geom
-dEQP-VK.pipeline.monolithic.extended_dynamic_state.cmd_buffer_start.topology_line_geom
dEQP-VK.rasterization.provoking_vertex.transform_feedback.per_pipeline.line_list
dEQP-VK.rasterization.provoking_vertex.transform_feedback.per_pipeline.line_list_with_adjacency
dEQP-VK.rasterization.provoking_vertex.transform_feedback.per_pipeline.triangle_list
const bool en = d->vk.ia.primitive_restart_enable;
if (gfx_level >= GFX11) {
- radeon_set_uconfig_reg(cs, R_03092C_GE_MULTI_PRIM_IB_RESET_EN, en);
+ radeon_set_uconfig_reg(cs, R_03092C_GE_MULTI_PRIM_IB_RESET_EN,
+ S_03092C_RESET_EN(en) |
+ /* This disables primitive restart for non-indexed draws.
+ * By keeping this set, we don't have to unset RESET_EN
+ * for non-indexed draws. */
+ S_03092C_DISABLE_FOR_AUTO_INDEX(1));
} else if (gfx_level >= GFX9) {
radeon_set_uconfig_reg(cs, R_03092C_VGT_MULTI_PRIM_IB_RESET_EN, en);
} else {
radeon_set_config_reg(cs, R_008B10_PA_SC_LINE_STIPPLE_STATE, 0);
}
+ if (physical_device->rad_info.gfx_level >= GFX11) {
+ /* Disable primitive restart for all non-indexed draws. */
+ radeon_set_uconfig_reg(cs, R_03092C_GE_MULTI_PRIM_IB_RESET_EN, S_03092C_DISABLE_FOR_AUTO_INDEX(1));
+ }
+
si_emit_compute(device, cs);
}