ARM: dts: stm32: Add alternate pinmux for ethernet RGMII on stm32mp15

Add another mux option for DWMAC RGMII, this is used on AV96 board.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index eb85ad1..6fce613 100644 (file)
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -213,6 +213,57 @@
                 };
        };
 
+       ethernet0_rgmii_pins_c: rgmii-2 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
+                                <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
+                                <STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
+                                <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
+                                <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
+                                <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
+                                <STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
+                                <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <2>;
+               };
+               pins2 {
+                       pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+               pins3 {
+                       pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
+                                <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
+                                <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
+                                <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
+                                <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
+                                <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
+                       bias-disable;
+               };
+       };
+
+       ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
+                                <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
+                                <STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
+                                <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
+                                <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
+                                <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
+                                <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
+                                <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
+                                <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
+                                <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
+                                <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
+                                <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
+                                <STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
+                                <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
+                                <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
+               };
+       };
+
        ethernet0_rmii_pins_a: rmii-0 {
                pins1 {
                        pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */