aco/print_ir: always print SDWA dst & src selections

This way, it becomes more apparent how SDWA behaves.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12640>

diff --git a/src/amd/compiler/aco_print_ir.cpp b/src/amd/compiler/aco_print_ir.cpp
index 618f8b6..45defdd 100644 (file)
--- a/src/amd/compiler/aco_print_ir.cpp
+++ b/src/amd/compiler/aco_print_ir.cpp
@@ -627,19 +627,32 @@ print_instr_format_specific(const Instruction* instr, FILE* output)
       }
       if (sdwa.clamp)
          fprintf(output, " clamp");
-      if (instr->isVOPC())
-         return;
-      if (instr->definitions[0].bytes() == 4) {
+      if (!instr->isVOPC()) {
          char sext = sdwa.dst_sel.sign_extend() ? 's' : 'u';
+         unsigned offset = sdwa.dst_sel.offset();
+         if (instr->definitions[0].isFixed())
+            offset += instr->definitions[0].physReg().byte();
          switch (sdwa.dst_sel.size()) {
-         case 1: fprintf(output, " dst_sel:%cbyte%u", sext, sdwa.dst_sel.offset()); break;
-         case 2: fprintf(output, " dst_sel:%cword%u", sext, sdwa.dst_sel.offset() >> 1); break;
-         case 4: break;
+         case 1: fprintf(output, " dst_sel:%cbyte%u", sext, offset); break;
+         case 2: fprintf(output, " dst_sel:%cword%u", sext, offset >> 1); break;
+         case 4: fprintf(output, " dst_sel:dword"); break;
+         default: break;
+         }
+         if (instr->definitions[0].bytes() < 4)
+            fprintf(output, " dst_preserve");
+      }
+      for (unsigned i = 0; i < std::min<unsigned>(2, instr->operands.size()); i++) {
+         char sext = sdwa.sel[i].sign_extend() ? 's' : 'u';
+         unsigned offset = sdwa.sel[i].offset();
+         if (instr->operands[i].isFixed())
+            offset += instr->operands[i].physReg().byte();
+         switch (sdwa.sel[i].size()) {
+         case 1: fprintf(output, " src%d_sel:%cbyte%u", i, sext, offset); break;
+         case 2: fprintf(output, " src%d_sel:%cword%u", i, sext, offset >> 1); break;
+         case 4: fprintf(output, " src%d_sel:dword", i); break;
          default: break;
          }
       }
-      if (instr->definitions[0].bytes() < 4)
-         fprintf(output, " dst_preserve");
    }
 }
 
@@ -659,12 +672,10 @@ aco_print_instr(const Instruction* instr, FILE* output, unsigned flags)
       bool* const abs = (bool*)alloca(instr->operands.size() * sizeof(bool));
       bool* const neg = (bool*)alloca(instr->operands.size() * sizeof(bool));
       bool* const opsel = (bool*)alloca(instr->operands.size() * sizeof(bool));
-      SubdwordSel* const sel = (SubdwordSel*)alloca(instr->operands.size() * sizeof(SubdwordSel));
       for (unsigned i = 0; i < instr->operands.size(); ++i) {
          abs[i] = false;
          neg[i] = false;
          opsel[i] = false;
-         sel[i] = SubdwordSel::dword;
       }
       if (instr->isVOP3()) {
          const VOP3_instruction& vop3 = instr->vop3();
@@ -686,7 +697,6 @@ aco_print_instr(const Instruction* instr, FILE* output, unsigned flags)
             abs[i] = sdwa.abs[i];
             neg[i] = sdwa.neg[i];
             opsel[i] = false;
-            sel[i] = sdwa.sel[i];
          }
       }
       for (unsigned i = 0; i < instr->operands.size(); ++i) {
@@ -701,16 +711,9 @@ aco_print_instr(const Instruction* instr, FILE* output, unsigned flags)
             fprintf(output, "|");
          if (opsel[i])
             fprintf(output, "hi(");
-         else if (sel[i].sign_extend())
-            fprintf(output, "sext(");
          aco_print_operand(&instr->operands[i], output, flags);
-         if (opsel[i] || (sel[i].sign_extend()))
+         if (opsel[i])
             fprintf(output, ")");
-         if (instr->isSDWA() && i < 2 && sel[i].size() < 4 && instr->operands[i].bytes() == 4) {
-            unsigned begin = sel[i].offset() * 8;
-            unsigned end = begin + sel[i].size() * 8 - 1;
-            fprintf(output, "[%u:%u]", begin, end);
-         }
          if (abs[i])
             fprintf(output, "|");
 

diff --git a/src/amd/compiler/tests/test_sdwa.cpp b/src/amd/compiler/tests/test_sdwa.cpp
index de46ee7..73a9a43 100644 (file)
--- a/src/amd/compiler/tests/test_sdwa.cpp
+++ b/src/amd/compiler/tests/test_sdwa.cpp
@@ -54,7 +54,7 @@ BEGIN_TEST(validate.sdwa.support)
          continue;
       //>> Validation results:
 
-      //~gfx7! SDWA is GFX8+ only: v1: %t0 = v_mul_f32 %a, %b
+      //~gfx7! SDWA is GFX8+ only: v1: %t0 = v_mul_f32 %a, %b dst_sel:dword src0_sel:dword src1_sel:dword
       //~gfx7! Validation failed
       //~gfx([89]|10)! Validation passed
       bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]);
@@ -70,19 +70,19 @@ BEGIN_TEST(validate.sdwa.operands)
          continue;
       //>> Validation results:
 
-      //~gfx8! Wrong source position for SGPR argument: v1: %_ = v_mul_f32 %sgpr0, %vgpr1
-      //~gfx8! Wrong source position for SGPR argument: v1: %_ = v_mul_f32 %vgpr0, %sgpr1
+      //~gfx8! Wrong source position for SGPR argument: v1: %_ = v_mul_f32 %sgpr0, %vgpr1 dst_sel:dword src0_sel:dword src1_sel:dword
+      //~gfx8! Wrong source position for SGPR argument: v1: %_ = v_mul_f32 %vgpr0, %sgpr1 dst_sel:dword src0_sel:dword src1_sel:dword
       bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[2], inputs[1]);
       bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[3]);
 
-      //~gfx8! Wrong source position for constant argument: v1: %_ = v_mul_f32 4, %vgpr1
-      //~gfx8! Wrong source position for constant argument: v1: %_ = v_mul_f32 %vgpr0, 4
+      //~gfx8! Wrong source position for constant argument: v1: %_ = v_mul_f32 4, %vgpr1 dst_sel:dword src0_sel:dword src1_sel:dword
+      //~gfx8! Wrong source position for constant argument: v1: %_ = v_mul_f32 %vgpr0, 4 dst_sel:dword src0_sel:dword src1_sel:dword
       bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(4u), inputs[1]);
       bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], Operand::c32(4u));
 
-      //! Literal applied on wrong instruction format: v1: %_ = v_mul_f32 0x1234, %vgpr1
-      //! Literal applied on wrong instruction format: v1: %_ = v_mul_f32 %vgpr0, 0x1234
-      //! Wrong source position for Literal argument: v1: %_ = v_mul_f32 %vgpr0, 0x1234
+      //! Literal applied on wrong instruction format: v1: %_ = v_mul_f32 0x1234, %vgpr1 dst_sel:dword src0_sel:dword src1_sel:dword
+      //! Literal applied on wrong instruction format: v1: %_ = v_mul_f32 %vgpr0, 0x1234 dst_sel:dword src0_sel:dword src1_sel:dword
+      //! Wrong source position for Literal argument: v1: %_ = v_mul_f32 %vgpr0, 0x1234 dst_sel:dword src0_sel:dword src1_sel:dword
       bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0x1234u), inputs[1]);
       bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], Operand::c32(0x1234u));
 
@@ -101,10 +101,10 @@ BEGIN_TEST(validate.sdwa.vopc)
 
       bld.vopc_sdwa(aco_opcode::v_cmp_gt_f32, bld.def(bld.lm, vcc), inputs[0], inputs[1]);
 
-      //~gfx8! SDWA+VOPC definition must be fixed to vcc on GFX8: s2: %_ = v_cmp_lt_f32 %vgpr0, %vgpr1
+      //~gfx8! SDWA+VOPC definition must be fixed to vcc on GFX8: s2: %_ = v_cmp_lt_f32 %vgpr0, %vgpr1 src0_sel:dword src1_sel:dword
       bld.vopc_sdwa(aco_opcode::v_cmp_lt_f32, bld.def(bld.lm), inputs[0], inputs[1]);
 
-      //~gfx(9|10)! SDWA VOPC clamp only supported on GFX8: s2: %_:vcc = v_cmp_eq_f32 %vgpr0, %vgpr1 clamp
+      //~gfx(9|10)! SDWA VOPC clamp only supported on GFX8: s2: %_:vcc = v_cmp_eq_f32 %vgpr0, %vgpr1 clamp src0_sel:dword src1_sel:dword
       bld.vopc_sdwa(aco_opcode::v_cmp_eq_f32, bld.def(bld.lm, vcc), inputs[0], inputs[1]).instr->sdwa().clamp = true;
 
       //! Validation failed
@@ -120,7 +120,7 @@ BEGIN_TEST(validate.sdwa.omod)
          continue;
       //>> Validation results:
 
-      //~gfx8! SDWA omod only supported on GFX9+: v1: %_ = v_mul_f32 %vgpr0, %vgpr1 *2
+      //~gfx8! SDWA omod only supported on GFX9+: v1: %_ = v_mul_f32 %vgpr0, %vgpr1 *2 dst_sel:dword src0_sel:dword src1_sel:dword
       //~gfx8! Validation failed
       //~gfx(9|10)! Validation passed
       bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]).instr->sdwa().omod = 1;
@@ -136,11 +136,11 @@ BEGIN_TEST(validate.sdwa.vcc)
          continue;
       //>> Validation results:
 
-      //! 3rd operand must be fixed to vcc with SDWA: v1: %_ = v_cndmask_b32 %vgpr0, %vgpr1, %_
+      //! 3rd operand must be fixed to vcc with SDWA: v1: %_ = v_cndmask_b32 %vgpr0, %vgpr1, %_ dst_sel:dword src0_sel:dword src1_sel:dword
       bld.vop2_sdwa(aco_opcode::v_cndmask_b32, bld.def(v1), inputs[0], inputs[1], inputs[2]);
       bld.vop2_sdwa(aco_opcode::v_cndmask_b32, bld.def(v1), inputs[0], inputs[1], bld.vcc(inputs[2]));
 
-      //! 2nd definition must be fixed to vcc with SDWA: v1: %_, s2: %_ = v_add_co_u32 %vgpr0, %vgpr1
+      //! 2nd definition must be fixed to vcc with SDWA: v1: %_, s2: %_ = v_add_co_u32 %vgpr0, %vgpr1 dst_sel:dword src0_sel:dword src1_sel:dword
       bld.vop2_sdwa(aco_opcode::v_add_co_u32, bld.def(v1), bld.def(bld.lm), inputs[0], inputs[1]);
       bld.vop2_sdwa(aco_opcode::v_add_co_u32, bld.def(v1), bld.def(bld.lm, vcc), inputs[0], inputs[1]);
 
@@ -157,53 +157,51 @@ BEGIN_TEST(optimize.sdwa.extract)
       if (!setup_cs("v1 v1 s1 s1", (chip_class)i, CHIP_UNKNOWN, is_signed ? "_signed" : "_unsigned"))
          continue;
 
-      //; funcs['b'] = lambda bits: ('sext(%%b)[%s]' if variant.endswith('_signed') else '%%b[%s]') % bits
-
-      //; def standard_test(index, offset, size):
-      //;    res = 'v1: %%res%d = v_mul_f32 %%a, @b(%d:%d)\n' % (index, offset % 32, offset % 32 + size % 32 - 1)
-      //;    res += 'p_unit_test %d, %%res%d' % (index, index)
+      //; def standard_test(index, sel):
+      //;    res = 'v1: %%res%s = v_mul_f32 %%a, %%b dst_sel:dword src0_sel:dword src1_sel:%c%s\n' % (index, 's' if variant.endswith('_signed') else 'u', sel)
+      //;    res += 'p_unit_test %s, %%res%s' % (index, index)
       //;    return res
-      //; funcs['standard_test'] = lambda a: standard_test(*(int(v) for v in a.split(',')))
+      //; funcs['standard_test'] = lambda a: standard_test(*(v for v in a.split(',')))
 
       aco_opcode ext = aco_opcode::p_extract;
       aco_opcode ins = aco_opcode::p_insert;
 
       {
-      //~gfx[^7].*! @standard_test(0, 0, 8)
+      //~gfx[^7].*! @standard_test(0,byte0)
       Temp bfe_byte0_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(8u),
                                     Operand::c32(is_signed));
       writeout(0, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], bfe_byte0_b));
 
-      //~gfx[^7].*! @standard_test(1, 8, 8)
+      //~gfx[^7].*! @standard_test(1,byte1)
       Temp bfe_byte1_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(1u), Operand::c32(8u),
                                     Operand::c32(is_signed));
       writeout(1, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], bfe_byte1_b));
 
-      //~gfx[^7].*! @standard_test(2, 16, 8)
+      //~gfx[^7].*! @standard_test(2,byte2)
       Temp bfe_byte2_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(2u), Operand::c32(8u),
                                     Operand::c32(is_signed));
       writeout(2, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], bfe_byte2_b));
 
-      //~gfx[^7].*! @standard_test(3, 24, 8)
+      //~gfx[^7].*! @standard_test(3,byte3)
       Temp bfe_byte3_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(3u), Operand::c32(8u),
                                     Operand::c32(is_signed));
       writeout(3, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], bfe_byte3_b));
 
-      //~gfx[^7].*! @standard_test(4, 0, 16)
+      //~gfx[^7].*! @standard_test(4,word0)
       Temp bfe_word0_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(16u),
                                     Operand::c32(is_signed));
       writeout(4, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], bfe_word0_b));
 
-      //~gfx[^7].*! @standard_test(5, 16, 16)
+      //~gfx[^7].*! @standard_test(5,word1)
       Temp bfe_word1_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(1u),
                                     Operand::c32(16u), Operand::c32(is_signed));
       writeout(5, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], bfe_word1_b));
 
-      //~gfx[^7]_unsigned! @standard_test(6, 0, 8)
+      //~gfx[^7]_unsigned! @standard_test(6,byte0)
       Temp bfi_byte0_b = bld.pseudo(ins, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(8u));
       writeout(6, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], bfi_byte0_b));
 
-      //~gfx[^7]_unsigned! @standard_test(7, 0, 16)
+      //~gfx[^7]_unsigned! @standard_test(7,word0)
       Temp bfi_word0_b =
          bld.pseudo(ins, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(16u));
       writeout(7, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], bfi_word0_b));
@@ -223,7 +221,7 @@ BEGIN_TEST(optimize.sdwa.extract)
       /* v_cvt_f32_ubyte[0-3] can be used instead of v_cvt_f32_u32+sdwa */
       //~gfx7_signed! v1: %bfe_byte0_b = p_extract %b, 0, 8, 1
       //~gfx7_signed! v1: %res9 = v_cvt_f32_u32 %bfe_byte0_b
-      //~gfx[^7]+_signed! v1: %res9 = v_cvt_f32_u32 @b(0:7)
+      //~gfx[^7]+_signed! v1: %res9 = v_cvt_f32_u32 %b dst_sel:dword src0_sel:sbyte0
       //~gfx\d+_unsigned! v1: %res9 = v_cvt_f32_ubyte0 %b
       //! p_unit_test 9, %res9
       Temp bfe_byte0_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(8u),
@@ -232,7 +230,7 @@ BEGIN_TEST(optimize.sdwa.extract)
 
       //~gfx7_signed! v1: %bfe_byte1_b = p_extract %b, 1, 8, 1
       //~gfx7_signed! v1: %res10 = v_cvt_f32_u32 %bfe_byte1_b
-      //~gfx[^7]+_signed! v1: %res10 = v_cvt_f32_u32 @b(8:15)
+      //~gfx[^7]+_signed! v1: %res10 = v_cvt_f32_u32 %b dst_sel:dword src0_sel:sbyte1
       //~gfx\d+_unsigned! v1: %res10 = v_cvt_f32_ubyte1 %b
       //! p_unit_test 10, %res10
       Temp bfe_byte1_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(1u), Operand::c32(8u),
@@ -241,7 +239,7 @@ BEGIN_TEST(optimize.sdwa.extract)
 
       //~gfx7_signed! v1: %bfe_byte2_b = p_extract %b, 2, 8, 1
       //~gfx7_signed! v1: %res11 = v_cvt_f32_u32 %bfe_byte2_b
-      //~gfx[^7]+_signed! v1: %res11 = v_cvt_f32_u32 @b(16:23)
+      //~gfx[^7]+_signed! v1: %res11 = v_cvt_f32_u32 %b dst_sel:dword src0_sel:sbyte2
       //~gfx\d+_unsigned! v1: %res11 = v_cvt_f32_ubyte2 %b
       //! p_unit_test 11, %res11
       Temp bfe_byte2_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(2u), Operand::c32(8u),
@@ -250,7 +248,7 @@ BEGIN_TEST(optimize.sdwa.extract)
 
       //~gfx7_signed! v1: %bfe_byte3_b = p_extract %b, 3, 8, 1
       //~gfx7_signed! v1: %res12 = v_cvt_f32_u32 %bfe_byte3_b
-      //~gfx[^7]+_signed! v1: %res12 = v_cvt_f32_u32 @b(24:31)
+      //~gfx[^7]+_signed! v1: %res12 = v_cvt_f32_u32 %b dst_sel:dword src0_sel:sbyte3
       //~gfx\d+_unsigned! v1: %res12 = v_cvt_f32_ubyte3 %b
       //! p_unit_test 12, %res12
       Temp bfe_byte3_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(3u), Operand::c32(8u),
@@ -284,7 +282,7 @@ BEGIN_TEST(optimize.sdwa.extract_modifiers)
 
       aco_opcode ext = aco_opcode::p_extract;
 
-      //! v1: %res0 = v_mul_f32 %a, -%b[0:7]
+      //! v1: %res0 = v_mul_f32 %a, -%b dst_sel:dword src0_sel:dword src1_sel:ubyte0
       //! p_unit_test 0, %res0
       Temp byte0 = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(8u),
                               Operand::zero());
@@ -292,8 +290,8 @@ BEGIN_TEST(optimize.sdwa.extract_modifiers)
       writeout(0, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], neg_byte0));
 
       //~gfx8! v1: %neg = v_mul_f32 -1.0, %b
-      //~gfx8! v1: %res1 = v_mul_f32 %a, %neg[0:7]
-      //~gfx(9|10)! v1: %neg_byte0 = v_mul_f32 -1.0, %b dst_sel:ubyte0
+      //~gfx8! v1: %res1 = v_mul_f32 %a, %neg dst_sel:dword src0_sel:dword src1_sel:ubyte0
+      //~gfx(9|10)! v1: %neg_byte0 = v_mul_f32 -1.0, %b dst_sel:ubyte0 src0_sel:dword src1_sel:dword
       //~gfx(9|10)! v1: %res1 = v_mul_f32 %a, %neg_byte0
       //! p_unit_test 1, %res1
       Temp neg = fneg(inputs[1]);
@@ -301,27 +299,27 @@ BEGIN_TEST(optimize.sdwa.extract_modifiers)
          bld.pseudo(ext, bld.def(v1), neg, Operand::zero(), Operand::c32(8u), Operand::zero());
       writeout(1, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], byte0_neg));
 
-      //! v1: %res2 = v_mul_f32 %a, |%b[0:7]|
+      //! v1: %res2 = v_mul_f32 %a, |%b| dst_sel:dword src0_sel:dword src1_sel:ubyte0
       //! p_unit_test 2, %res2
       Temp abs_byte0 = fabs(byte0);
       writeout(2, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], abs_byte0));
 
       //! v1: %abs = v_mul_f32 1.0, |%b|
-      //! v1: %res3 = v_mul_f32 %a, %abs[0:7]
+      //! v1: %res3 = v_mul_f32 %a, %abs dst_sel:dword src0_sel:dword src1_sel:ubyte0
       //! p_unit_test 3, %res3
       Temp abs = fabs(inputs[1]);
       Temp byte0_abs =
          bld.pseudo(ext, bld.def(v1), abs, Operand::zero(), Operand::c32(8u), Operand::zero());
       writeout(3, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], byte0_abs));
 
-      //! v1: %res4 = v_mul_f32 %1, -|%2[0:7]|
+      //! v1: %res4 = v_mul_f32 %1, -|%2| dst_sel:dword src0_sel:dword src1_sel:ubyte0
       //! p_unit_test 4, %res4
       Temp neg_abs_byte0 = fneg(abs_byte0);
       writeout(4, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], neg_abs_byte0));
 
       //~gfx8! v1: %neg_abs = v_mul_f32 -1.0, %abs
-      //~gfx8! v1: %res5 = v_mul_f32 %a, %neg_abs[0:7]
-      //~gfx(9|10)! v1: %neg_abs_byte0 = v_mul_f32 -1.0, %abs dst_sel:ubyte0
+      //~gfx8! v1: %res5 = v_mul_f32 %a, %neg_abs dst_sel:dword src0_sel:dword src1_sel:ubyte0
+      //~gfx(9|10)! v1: %neg_abs_byte0 = v_mul_f32 -1.0, %abs dst_sel:ubyte0 src0_sel:dword src1_sel:dword
       //~gfx(9|10)! v1: %res5 = v_mul_f32 %a, %neg_abs_byte0
       //! p_unit_test 5, %res5
       Temp neg_abs = fneg(abs);
@@ -343,7 +341,7 @@ BEGIN_TEST(optimize.sdwa.extract.sgpr)
 
       //~gfx8! v1: %byte0_b = p_extract %b, 0, 8, 0
       //~gfx8! v1: %res1 = v_mul_f32 %c, %byte0_b
-      //~gfx(9|10)! v1: %res1 = v_mul_f32 %c, %b[0:7]
+      //~gfx(9|10)! v1: %res1 = v_mul_f32 %c, %b dst_sel:dword src0_sel:dword src1_sel:ubyte0
       //! p_unit_test 1, %res1
       Temp byte0_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(8u),
                                 Operand::zero());
@@ -351,7 +349,7 @@ BEGIN_TEST(optimize.sdwa.extract.sgpr)
 
       //~gfx8! v1: %byte0_c = p_extract %c, 0, 8, 0
       //~gfx8! v1: %res2 = v_mul_f32 %a, %byte0_c
-      //~gfx(9|10)! v1: %res2 = v_mul_f32 %a, %c[0:7]
+      //~gfx(9|10)! v1: %res2 = v_mul_f32 %a, %c dst_sel:dword src0_sel:dword src1_sel:ubyte0
       //! p_unit_test 2, %res2
       Temp byte0_c = bld.pseudo(ext, bld.def(v1), inputs[2], Operand::zero(), Operand::c32(8u),
                                 Operand::zero());
@@ -359,7 +357,7 @@ BEGIN_TEST(optimize.sdwa.extract.sgpr)
 
       //~gfx8! v1: %byte0_c_2 = p_extract %c, 0, 8, 0
       //~gfx8! v1: %res3 = v_mul_f32 %c, %byte0_c_2
-      //~gfx(9|10)! v1: %res3 = v_mul_f32 %c, %c[0:7]
+      //~gfx(9|10)! v1: %res3 = v_mul_f32 %c, %c dst_sel:dword src0_sel:dword src1_sel:ubyte0
       //! p_unit_test 3, %res3
       byte0_c = bld.pseudo(ext, bld.def(v1), inputs[2], Operand::zero(), Operand::c32(8u),
                            Operand::zero());
@@ -367,7 +365,7 @@ BEGIN_TEST(optimize.sdwa.extract.sgpr)
 
       //~gfx(8|9)! v1: %byte0_c_3 = p_extract %c, 0, 8, 0
       //~gfx(8|9)! v1: %res4 = v_mul_f32 %d, %byte0_c_3
-      //~gfx10! v1: %res4 = v_mul_f32 %d, %c[0:7]
+      //~gfx10! v1: %res4 = v_mul_f32 %d, %c dst_sel:dword src0_sel:dword src1_sel:ubyte0
       //! p_unit_test 4, %res4
       byte0_c = bld.pseudo(ext, bld.def(v1), inputs[2], Operand::zero(), Operand::c32(8u),
                            Operand::zero());
@@ -383,7 +381,7 @@ BEGIN_TEST(optimize.sdwa.from_vop3)
       if (!setup_cs("v1 v1 s1 s1", (chip_class)i))
          continue;
 
-      //! v1: %res0 = v_mul_f32 -|%a|, %b[0:7]
+      //! v1: %res0 = v_mul_f32 -|%a|, %b dst_sel:dword src0_sel:dword src1_sel:ubyte0
       //! p_unit_test 0, %res0
       Temp byte0_b = bld.pseudo(aco_opcode::p_extract, bld.def(v1), inputs[1], Operand::zero(),
                                 Operand::c32(8u), Operand::zero());
@@ -394,7 +392,7 @@ BEGIN_TEST(optimize.sdwa.from_vop3)
 
       //~gfx8! v1: %byte0_b_0 = p_extract %b, 0, 8, 0
       //~gfx8! v1: %res1 = v_mul_f32 %a, %byte0_b_0 *4
-      //~gfx(9|10)! v1: %res1 = v_mul_f32 %a, %b[0:7] *4
+      //~gfx(9|10)! v1: %res1 = v_mul_f32 %a, %b *4 dst_sel:dword src0_sel:dword src1_sel:ubyte0
       //! p_unit_test 1, %res1
       byte0_b = bld.pseudo(aco_opcode::p_extract, bld.def(v1), inputs[1], Operand::zero(),
                            Operand::c32(8u), Operand::zero());
@@ -404,7 +402,7 @@ BEGIN_TEST(optimize.sdwa.from_vop3)
 
       //~gfx8! v1: %byte0_b_1 = p_extract %b, 0, 8, 0
       //~gfx8! v1: %res2 = v_mul_f32 %byte0_b_1, %c
-      //~gfx(9|10)! v1: %res2 = v_mul_f32 %b[0:7], %c
+      //~gfx(9|10)! v1: %res2 = v_mul_f32 %b, %c dst_sel:dword src0_sel:ubyte0 src1_sel:dword
       //! p_unit_test 2, %res2
       byte0_b = bld.pseudo(aco_opcode::p_extract, bld.def(v1), inputs[1], Operand::zero(),
                            Operand::c32(8u), Operand::zero());
@@ -433,43 +431,43 @@ BEGIN_TEST(optimize.sdwa.insert)
       aco_opcode ext = aco_opcode::p_extract;
       aco_opcode ins = aco_opcode::p_insert;
 
-      //~gfx[^7]! v1: %res0 = v_mul_f32 %a, %b dst_sel:ubyte0
+      //~gfx[^7]! v1: %res0 = v_mul_f32 %a, %b dst_sel:ubyte0 src0_sel:dword src1_sel:dword
       //~gfx[^7]! p_unit_test 0, %res0
       Temp val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]);
       writeout(0, bld.pseudo(ins, bld.def(v1), val, Operand::zero(), Operand::c32(8u)));
 
-      //~gfx[^7]! v1: %res1 = v_mul_f32 %a, %b dst_sel:ubyte1
+      //~gfx[^7]! v1: %res1 = v_mul_f32 %a, %b dst_sel:ubyte1 src0_sel:dword src1_sel:dword
       //~gfx[^7]! p_unit_test 1, %res1
       val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]);
       writeout(1, bld.pseudo(ins, bld.def(v1), val, Operand::c32(1u), Operand::c32(8u)));
 
-      //~gfx[^7]! v1: %res2 = v_mul_f32 %a, %b dst_sel:ubyte2
+      //~gfx[^7]! v1: %res2 = v_mul_f32 %a, %b dst_sel:ubyte2 src0_sel:dword src1_sel:dword
       //~gfx[^7]! p_unit_test 2, %res2
       val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]);
       writeout(2, bld.pseudo(ins, bld.def(v1), val, Operand::c32(2u), Operand::c32(8u)));
 
-      //~gfx[^7]! v1: %res3 = v_mul_f32 %a, %b dst_sel:ubyte3
+      //~gfx[^7]! v1: %res3 = v_mul_f32 %a, %b dst_sel:ubyte3 src0_sel:dword src1_sel:dword
       //~gfx[^7]! p_unit_test 3, %res3
       val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]);
       writeout(3, bld.pseudo(ins, bld.def(v1), val, Operand::c32(3u), Operand::c32(8u)));
 
-      //~gfx[^7]! v1: %res4 = v_mul_f32 %a, %b dst_sel:uword0
+      //~gfx[^7]! v1: %res4 = v_mul_f32 %a, %b dst_sel:uword0 src0_sel:dword src1_sel:dword
       //~gfx[^7]! p_unit_test 4, %res4
       val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]);
       writeout(4, bld.pseudo(ins, bld.def(v1), val, Operand::zero(), Operand::c32(16u)));
 
-      //~gfx[^7]! v1: %res5 = v_mul_f32 %a, %b dst_sel:uword1
+      //~gfx[^7]! v1: %res5 = v_mul_f32 %a, %b dst_sel:uword1 src0_sel:dword src1_sel:dword
       //~gfx[^7]! p_unit_test 5, %res5
       val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]);
       writeout(5, bld.pseudo(ins, bld.def(v1), val, Operand::c32(1u), Operand::c32(16u)));
 
-      //~gfx[^7]! v1: %res6 = v_mul_f32 %a, %b dst_sel:ubyte0
+      //~gfx[^7]! v1: %res6 = v_mul_f32 %a, %b dst_sel:ubyte0 src0_sel:dword src1_sel:dword
       //~gfx[^7]! p_unit_test 6, %res6
       val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]);
       writeout(
          6, bld.pseudo(ext, bld.def(v1), val, Operand::zero(), Operand::c32(8u), Operand::zero()));
 
-      //~gfx[^7]! v1: %res7 = v_mul_f32 %a, %b dst_sel:uword0
+      //~gfx[^7]! v1: %res7 = v_mul_f32 %a, %b dst_sel:uword0 src0_sel:dword src1_sel:dword
       //~gfx[^7]! p_unit_test 7, %res7
       val = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], inputs[1]);
       writeout(
@@ -530,20 +528,20 @@ BEGIN_TEST(optimize.sdwa.insert_modifiers)
 
       //~gfx8! v1: %tmp0 = v_rcp_f32 %a *2
       //~gfx8! v1: %res0 = p_insert %tmp0, 0, 8
-      //~gfx9! v1: %res0 = v_rcp_f32 %a *2 dst_sel:ubyte0
+      //~gfx9! v1: %res0 = v_rcp_f32 %a *2 dst_sel:ubyte0 src0_sel:dword
       //! p_unit_test 0, %res0
       Temp val = bld.vop1(aco_opcode::v_rcp_f32, bld.def(v1), inputs[0]);
       val = bld.vop2_e64(aco_opcode::v_mul_f32, bld.def(v1), val, Operand::c32(0x40000000u));
       writeout(0, bld.pseudo(ins, bld.def(v1), val, Operand::zero(), Operand::c32(8u)));
 
-      //! v1: %res1 = v_rcp_f32 %a clamp dst_sel:ubyte0
+      //! v1: %res1 = v_rcp_f32 %a clamp dst_sel:ubyte0 src0_sel:dword
       //! p_unit_test 1, %res1
       val = bld.vop1(aco_opcode::v_rcp_f32, bld.def(v1), inputs[0]);
       val = bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), val, Operand::zero(),
                      Operand::c32(0x3f800000u));
       writeout(1, bld.pseudo(ins, bld.def(v1), val, Operand::zero(), Operand::c32(8u)));
 
-      //! v1: %tmp2 = v_rcp_f32 %a dst_sel:ubyte0
+      //! v1: %tmp2 = v_rcp_f32 %a dst_sel:ubyte0 src0_sel:dword
       //! v1: %res2 = v_mul_f32 %tmp2, 2.0
       //! p_unit_test 2, %res2
       val = bld.vop1(aco_opcode::v_rcp_f32, bld.def(v1), inputs[0]);
@@ -551,7 +549,7 @@ BEGIN_TEST(optimize.sdwa.insert_modifiers)
       val = bld.vop2_e64(aco_opcode::v_mul_f32, bld.def(v1), val, Operand::c32(0x40000000u));
       writeout(2, val);
 
-      //! v1: %tmp3 = v_rcp_f32 %a dst_sel:ubyte0
+      //! v1: %tmp3 = v_rcp_f32 %a dst_sel:ubyte0 src0_sel:dword
       //! v1: %res3 = v_med3_f32 %tmp3, 0, 1.0
       //! p_unit_test 3, %res3
       val = bld.vop1(aco_opcode::v_rcp_f32, bld.def(v1), inputs[0]);
@@ -562,7 +560,7 @@ BEGIN_TEST(optimize.sdwa.insert_modifiers)
 
       //~gfx8! v1: %tmp4 = v_rcp_f32 %a *2 clamp
       //~gfx8! v1: %res4 = p_insert %tmp4, 0, 8
-      //~gfx9! v1: %res4 = v_rcp_f32 %a *2 clamp dst_sel:ubyte0
+      //~gfx9! v1: %res4 = v_rcp_f32 %a *2 clamp dst_sel:ubyte0 src0_sel:dword
       //! p_unit_test 4, %res4
       val = bld.vop1(aco_opcode::v_rcp_f32, bld.def(v1), inputs[0]);
       val = bld.vop2_e64(aco_opcode::v_mul_f32, bld.def(v1), val, Operand::c32(0x40000000u));

diff --git a/src/amd/compiler/tests/test_to_hw_instr.cpp b/src/amd/compiler/tests/test_to_hw_instr.cpp
index 83975a2..1d2ce8c 100644 (file)
--- a/src/amd/compiler/tests/test_to_hw_instr.cpp
+++ b/src/amd/compiler/tests/test_to_hw_instr.cpp
@@ -240,18 +240,18 @@ BEGIN_TEST(to_hw_instr.swap_subdword)
       //~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
       //~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
       //~gfx9! v1: %0:v[0],  v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
-      //~gfx[89]! v2b: %0:v[1][16:32] = v_mov_b32 %0:v[0][16:32] dst_preserve
+      //~gfx[89]! v2b: %0:v[1][16:32] = v_mov_b32 %0:v[0][16:32] dst_sel:uword1 dst_preserve src0_sel:uword1
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u));
       bld.pseudo(aco_opcode::p_parallelcopy,
                  Definition(v0_lo, v1), Definition(v1_lo, v2b),
                  Operand(v1_lo, v1), Operand(v0_lo, v2b));
 
       //~gfx[89]! p_unit_test 2
-      //~gfx[89]! v2b: %0:v[0][16:32] = v_mov_b32 %0:v[1][16:32] dst_preserve
-      //~gfx[89]! v2b: %0:v[1][16:32] = v_mov_b32 %0:v[0][0:16] dst_preserve
-      //~gfx[89]! v2b: %0:v[1][0:16] = v_xor_b32 %0:v[1][0:16], %0:v[0][0:16] dst_preserve
-      //~gfx[89]! v2b: %0:v[0][0:16] = v_xor_b32 %0:v[1][0:16], %0:v[0][0:16] dst_preserve
-      //~gfx[89]! v2b: %0:v[1][0:16] = v_xor_b32 %0:v[1][0:16], %0:v[0][0:16] dst_preserve
+      //~gfx[89]! v2b: %0:v[0][16:32] = v_mov_b32 %0:v[1][16:32] dst_sel:uword1 dst_preserve src0_sel:uword1
+      //~gfx[89]! v2b: %0:v[1][16:32] = v_mov_b32 %0:v[0][0:16] dst_sel:uword1 dst_preserve src0_sel:uword0
+      //~gfx[89]! v2b: %0:v[1][0:16] = v_xor_b32 %0:v[1][0:16], %0:v[0][0:16] dst_sel:uword0 dst_preserve src0_sel:uword0 src1_sel:uword0
+      //~gfx[89]! v2b: %0:v[0][0:16] = v_xor_b32 %0:v[1][0:16], %0:v[0][0:16] dst_sel:uword0 dst_preserve src0_sel:uword0 src1_sel:uword0
+      //~gfx[89]! v2b: %0:v[1][0:16] = v_xor_b32 %0:v[1][0:16], %0:v[0][0:16] dst_sel:uword0 dst_preserve src0_sel:uword0 src1_sel:uword0
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u));
       bld.pseudo(aco_opcode::p_parallelcopy,
                  Definition(v0_lo, v1), Definition(v1_lo, v2b), Definition(v1_hi, v2b),
@@ -262,8 +262,8 @@ BEGIN_TEST(to_hw_instr.swap_subdword)
       //~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
       //~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
       //~gfx9! v1: %0:v[0],  v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
-      //~gfx[89]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[0][0:16] dst_preserve
-      //~gfx[89]! v1b: %0:v[1][16:24] = v_mov_b32 %0:v[0][16:24] dst_preserve
+      //~gfx[89]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[0][0:16] dst_sel:uword0 dst_preserve src0_sel:uword0
+      //~gfx[89]! v1b: %0:v[1][16:24] = v_mov_b32 %0:v[0][16:24] dst_sel:ubyte2 dst_preserve src0_sel:ubyte2
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3u));
       bld.pseudo(aco_opcode::p_parallelcopy,
                  Definition(v0_lo, v1), Definition(v1_b3, v1b),
@@ -274,8 +274,8 @@ BEGIN_TEST(to_hw_instr.swap_subdword)
       //~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
       //~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
       //~gfx9! v1: %0:v[0],  v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
-      //~gfx[89]! v1b: %0:v[1][8:16] = v_mov_b32 %0:v[0][8:16] dst_preserve
-      //~gfx[89]! v2b: %0:v[1][16:32] = v_mov_b32 %0:v[0][16:32] dst_preserve
+      //~gfx[89]! v1b: %0:v[1][8:16] = v_mov_b32 %0:v[0][8:16] dst_sel:ubyte1 dst_preserve src0_sel:ubyte1
+      //~gfx[89]! v2b: %0:v[1][16:32] = v_mov_b32 %0:v[0][16:32] dst_sel:uword1 dst_preserve src0_sel:uword1
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(4u));
       bld.pseudo(aco_opcode::p_parallelcopy,
                  Definition(v0_lo, v1), Definition(v1_lo, v1b),
@@ -286,8 +286,8 @@ BEGIN_TEST(to_hw_instr.swap_subdword)
       //~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[0], %0:v[1]
       //~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[0], %0:v[1]
       //~gfx9! v1: %0:v[1],  v1: %0:v[0] = v_swap_b32 %0:v[0], %0:v[1]
-      //~gfx[89]! v1b: %0:v[0][8:16] = v_mov_b32 %0:v[1][8:16] dst_preserve
-      //~gfx[89]! v1b: %0:v[0][24:32] = v_mov_b32 %0:v[1][24:32] dst_preserve
+      //~gfx[89]! v1b: %0:v[0][8:16] = v_mov_b32 %0:v[1][8:16] dst_sel:ubyte1 dst_preserve src0_sel:ubyte1
+      //~gfx[89]! v1b: %0:v[0][24:32] = v_mov_b32 %0:v[1][24:32] dst_sel:ubyte3 dst_preserve src0_sel:ubyte3
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(5u));
       bld.pseudo(aco_opcode::p_parallelcopy,
                  Definition(v0_lo, v1b), Definition(v0_hi, v1b), Definition(v1_lo, v1),
@@ -319,9 +319,9 @@ BEGIN_TEST(to_hw_instr.swap_subdword)
       //~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
       //~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
       //~gfx9! v1: %0:v[0],  v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
-      //~gfx[89]! v1b: %0:v[1][24:32] = v_xor_b32 %0:v[1][24:32], %0:v[0][24:32] dst_preserve
-      //~gfx[89]! v1b: %0:v[0][24:32] = v_xor_b32 %0:v[1][24:32], %0:v[0][24:32] dst_preserve
-      //~gfx[89]! v1b: %0:v[1][24:32] = v_xor_b32 %0:v[1][24:32], %0:v[0][24:32] dst_preserve
+      //~gfx[89]! v1b: %0:v[1][24:32] = v_xor_b32 %0:v[1][24:32], %0:v[0][24:32] dst_sel:ubyte3 dst_preserve src0_sel:ubyte3 src1_sel:ubyte3
+      //~gfx[89]! v1b: %0:v[0][24:32] = v_xor_b32 %0:v[1][24:32], %0:v[0][24:32] dst_sel:ubyte3 dst_preserve src0_sel:ubyte3 src1_sel:ubyte3
+      //~gfx[89]! v1b: %0:v[1][24:32] = v_xor_b32 %0:v[1][24:32], %0:v[0][24:32] dst_sel:ubyte3 dst_preserve src0_sel:ubyte3 src1_sel:ubyte3
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(8u));
       bld.pseudo(aco_opcode::p_parallelcopy,
                  Definition(v0_lo, v3b), Definition(v1_lo, v3b),
@@ -332,26 +332,26 @@ BEGIN_TEST(to_hw_instr.swap_subdword)
       //~gfx8! v1: %0:v[0] = v_xor_b32 %0:v[1], %0:v[0]
       //~gfx8! v1: %0:v[1] = v_xor_b32 %0:v[1], %0:v[0]
       //~gfx9! v1: %0:v[0],  v1: %0:v[1] = v_swap_b32 %0:v[1], %0:v[0]
-      //~gfx[89]! v1b: %0:v[1][24:32] = v_mov_b32 %0:v[0][24:32] dst_preserve
+      //~gfx[89]! v1b: %0:v[1][24:32] = v_mov_b32 %0:v[0][24:32] dst_sel:ubyte3 dst_preserve src0_sel:ubyte3
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(9u));
       bld.pseudo(aco_opcode::p_parallelcopy,
                  Definition(v0_lo, v3b), Definition(v1_lo, v3b), Definition(v0_b3, v1b),
                  Operand(v1_lo, v3b), Operand(v0_lo, v3b), Operand(v1_b3, v1b));
 
       //~gfx[89]! p_unit_test 10
-      //~gfx[89]! v1b: %0:v[1][8:16] = v_xor_b32 %0:v[1][8:16], %0:v[0][8:16] dst_preserve
-      //~gfx[89]! v1b: %0:v[0][8:16] = v_xor_b32 %0:v[1][8:16], %0:v[0][8:16] dst_preserve
-      //~gfx[89]! v1b: %0:v[1][8:16] = v_xor_b32 %0:v[1][8:16], %0:v[0][8:16] dst_preserve
-      //~gfx[89]! v1b: %0:v[1][16:24] = v_xor_b32 %0:v[1][16:24], %0:v[0][16:24] dst_preserve
-      //~gfx[89]! v1b: %0:v[0][16:24] = v_xor_b32 %0:v[1][16:24], %0:v[0][16:24] dst_preserve
-      //~gfx[89]! v1b: %0:v[1][16:24] = v_xor_b32 %0:v[1][16:24], %0:v[0][16:24] dst_preserve
+      //~gfx[89]! v1b: %0:v[1][8:16] = v_xor_b32 %0:v[1][8:16], %0:v[0][8:16] dst_sel:ubyte1 dst_preserve src0_sel:ubyte1 src1_sel:ubyte1
+      //~gfx[89]! v1b: %0:v[0][8:16] = v_xor_b32 %0:v[1][8:16], %0:v[0][8:16] dst_sel:ubyte1 dst_preserve src0_sel:ubyte1 src1_sel:ubyte1
+      //~gfx[89]! v1b: %0:v[1][8:16] = v_xor_b32 %0:v[1][8:16], %0:v[0][8:16] dst_sel:ubyte1 dst_preserve src0_sel:ubyte1 src1_sel:ubyte1
+      //~gfx[89]! v1b: %0:v[1][16:24] = v_xor_b32 %0:v[1][16:24], %0:v[0][16:24] dst_sel:ubyte2 dst_preserve src0_sel:ubyte2 src1_sel:ubyte2
+      //~gfx[89]! v1b: %0:v[0][16:24] = v_xor_b32 %0:v[1][16:24], %0:v[0][16:24] dst_sel:ubyte2 dst_preserve src0_sel:ubyte2 src1_sel:ubyte2
+      //~gfx[89]! v1b: %0:v[1][16:24] = v_xor_b32 %0:v[1][16:24], %0:v[0][16:24] dst_sel:ubyte2 dst_preserve src0_sel:ubyte2 src1_sel:ubyte2
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(10u));
       bld.pseudo(aco_opcode::p_parallelcopy,
                  Definition(v0_b1, v2b), Definition(v1_b1, v2b),
                  Operand(v1_b1, v2b), Operand(v0_b1, v2b));
 
       //~gfx[89]! p_unit_test 11
-      //~gfx[89]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[0][16:32] dst_preserve
+      //~gfx[89]! v2b: %0:v[1][0:16] = v_mov_b32 %0:v[0][16:32] dst_sel:uword0 dst_preserve src0_sel:uword1
       //~gfx[89]! v1: %0:v[0] = v_mov_b32 42
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(11u));
       bld.pseudo(aco_opcode::p_parallelcopy, Definition(v0_lo, v1), Definition(v1_lo, v2b),
@@ -419,7 +419,7 @@ BEGIN_TEST(to_hw_instr.subdword_constant)
 
       /* 16-bit copy */
       //! p_unit_test 6
-      //! v2b: %_:v[0][0:16] = v_add_f16 0.5, 0 dst_preserve
+      //! v2b: %_:v[0][0:16] = v_add_f16 0.5, 0 dst_sel:uword0 dst_preserve src0_sel:uword0 src1_sel:dword
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(6u));
       bld.pseudo(aco_opcode::p_parallelcopy, Definition(v0_lo, v2b), Operand::c16(0x3800));
 
@@ -438,20 +438,20 @@ BEGIN_TEST(to_hw_instr.subdword_constant)
       bld.pseudo(aco_opcode::p_parallelcopy, Definition(v0_hi, v2b), Operand::c16(0x4205));
 
       //! p_unit_test 9
-      //! v1b: %_:v[0][8:16] = v_mov_b32 0 dst_preserve
-      //! v1b: %_:v[0][16:24] = v_mov_b32 56 dst_preserve
+      //! v1b: %_:v[0][8:16] = v_mov_b32 0 dst_sel:ubyte1 dst_preserve src0_sel:dword
+      //! v1b: %_:v[0][16:24] = v_mov_b32 56 dst_sel:ubyte2 dst_preserve src0_sel:dword
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(9u));
       bld.pseudo(aco_opcode::p_parallelcopy, Definition(v0_b1, v2b), Operand::c16(0x3800));
 
       //! p_unit_test 10
-      //! v1b: %_:v[0][8:16] = v_mov_b32 5 dst_preserve
-      //! v1b: %_:v[0][16:24] = v_mul_u32_u24 2, 33 dst_preserve
+      //! v1b: %_:v[0][8:16] = v_mov_b32 5 dst_sel:ubyte1 dst_preserve src0_sel:dword
+      //! v1b: %_:v[0][16:24] = v_mul_u32_u24 2, 33 dst_sel:ubyte2 dst_preserve src0_sel:dword src1_sel:dword
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(10u));
       bld.pseudo(aco_opcode::p_parallelcopy, Definition(v0_b1, v2b), Operand::c16(0x4205));
 
       /* 8-bit copy */
       //! p_unit_test 11
-      //! v1b: %_:v[0][0:8] = v_mul_u32_u24 2, 33 dst_preserve
+      //! v1b: %_:v[0][0:8] = v_mul_u32_u24 2, 33 dst_sel:ubyte0 dst_preserve src0_sel:dword src1_sel:dword
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(11u));
       bld.pseudo(aco_opcode::p_parallelcopy, Definition(v0_lo, v1b), Operand::c8(0x42));
 
@@ -505,7 +505,7 @@ BEGIN_TEST(to_hw_instr.extract)
       //; funcs['v_shr'] = lambda _: 'v_ashrrev_i32' if variant.endswith('_signed') else 'v_lshrrev_b32'
       //; funcs['s_bfe'] = lambda _: 's_bfe_i32' if variant.endswith('_signed') else 's_bfe_u32'
       //; funcs['s_shr'] = lambda _: 's_ashr_i32' if variant.endswith('_signed') else 's_lshr_b32'
-      //; funcs['sel'] = lambda bits: ('sext(%%_:v[1])[%s]' if variant.endswith('_signed') else '%%_:v[1][%s]') % bits
+      //; funcs['byte'] = lambda n: '%cbyte%s' % ('s' if variant.endswith('_signed') else 'u', n)
 
       //>> p_unit_test 0
       bld.pseudo(aco_opcode::p_unit_test, Operand::zero());
@@ -554,15 +554,15 @@ BEGIN_TEST(to_hw_instr.extract)
       //>> p_unit_test 4
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(4u));
       //~gfx7.*! v2b: %_:v[0][0:16] = @v_bfe %_:v[1][0:16], 0, 8
-      //~gfx[^7].*! v2b: %_:v[0][0:16] = v_mov_b32 @sel(0:7) dst_preserve
+      //~gfx[^7].*! v2b: %_:v[0][0:16] = v_mov_b32 %_:v[1] dst_sel:uword0 dst_preserve src0_sel:@byte(0)
       EXT(0, 0)
-      //~gfx[^7].*! v2b: %_:v[0][0:16] = v_mov_b32 @sel(16:23) dst_preserve
+      //~gfx[^7].*! v2b: %_:v[0][0:16] = v_mov_b32 %_:v[1] dst_sel:uword0 dst_preserve src0_sel:@byte(2)
       if (i != GFX7)
          EXT(0, 2)
       //~gfx7.*! v2b: %_:v[0][0:16] = @v_bfe %_:v[1][0:16], 8, 8
-      //~gfx[^7].*! v2b: %_:v[0][0:16] = v_mov_b32 @sel(8:15) dst_preserve
+      //~gfx[^7].*! v2b: %_:v[0][0:16] = v_mov_b32 %_:v[1] dst_sel:uword0 dst_preserve src0_sel:@byte(1)
       EXT(1, 0)
-      //~gfx[^7].*! v2b: %_:v[0][0:16] = v_mov_b32 @sel(24:31) dst_preserve
+      //~gfx[^7].*! v2b: %_:v[0][0:16] = v_mov_b32 %_:v[1] dst_sel:uword0 dst_preserve src0_sel:@byte(3)
       if (i != GFX7)
          EXT(1, 2)
 
@@ -595,11 +595,11 @@ BEGIN_TEST(to_hw_instr.insert)
       INS(0, 8)
       //~gfx7! v1: %0:v[0] = v_bfe_u32 %0:v[1], 0, 8
       //~gfx7! v1: %0:v[0] = v_lshlrev_b32 8, %0:v[0]
-      //~gfx[^7]! v1: %0:v[0] = v_mov_b32 %0:v[1] dst_sel:ubyte1
+      //~gfx[^7]! v1: %0:v[0] = v_mov_b32 %0:v[1] dst_sel:ubyte1 src0_sel:dword
       INS(1, 8)
       //~gfx7! v1: %0:v[0] = v_bfe_u32 %0:v[1], 0, 8
       //~gfx7! v1: %0:v[0] = v_lshlrev_b32 16, %0:v[0]
-      //~gfx[^7]! v1: %0:v[0] = v_mov_b32 %0:v[1] dst_sel:ubyte2
+      //~gfx[^7]! v1: %0:v[0] = v_mov_b32 %0:v[1] dst_sel:ubyte2 src0_sel:dword
       INS(2, 8)
       //! v1: %0:v[0] = v_lshlrev_b32 24, %0:v[1]
       INS(3, 8)
@@ -640,15 +640,15 @@ BEGIN_TEST(to_hw_instr.insert)
       //>> p_unit_test 2
       bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u));
       //~gfx7! v2b: %_:v[0][0:16] = v_bfe_u32 %_:v[1][0:16], 0, 8
-      //~gfx[^7]! v2b: %0:v[0][0:16] = v_lshlrev_b32 0, %0:v[1][0:7] dst_preserve
+      //~gfx[^7]! v2b: %0:v[0][0:16] = v_lshlrev_b32 0, %0:v[1] dst_sel:uword0 dst_preserve src0_sel:dword src1_sel:ubyte0
       INS(0, 0)
-      //~gfx[^7]! v2b: %0:v[0][16:32] = v_lshlrev_b32 0, %0:v[1][0:7] dst_preserve
+      //~gfx[^7]! v2b: %0:v[0][16:32] = v_lshlrev_b32 0, %0:v[1] dst_sel:uword1 dst_preserve src0_sel:dword src1_sel:ubyte0
       if (i != GFX7)
          INS(0, 2)
       //~gfx7! v2b: %_:v[0][0:16] = v_lshlrev_b32 8, %_:v[1][0:16]
-      //~gfx[^7]! v2b: %0:v[0][0:16] = v_lshlrev_b32 8, %0:v[1][0:7] dst_preserve
+      //~gfx[^7]! v2b: %0:v[0][0:16] = v_lshlrev_b32 8, %0:v[1] dst_sel:uword0 dst_preserve src0_sel:dword src1_sel:ubyte0
       INS(1, 0)
-      //~gfx[^7]! v2b: %0:v[0][16:32] = v_lshlrev_b32 8, %0:v[1][0:7] dst_preserve
+      //~gfx[^7]! v2b: %0:v[0][16:32] = v_lshlrev_b32 8, %0:v[1] dst_sel:uword1 dst_preserve src0_sel:dword src1_sel:ubyte0
       if (i != GFX7)
          INS(1, 2)