ARM: dts: ux500: Fix up the Janice NFC chip

The NFC chip in Janice is a PNX544 not PNX547 and it is on
I2C address 0x2b. Fix it up. This is only mounted in Janice
models designated GT-I9070P.

Cc: Stefan Hansson <newbyte@disroot.org>
Link: https://lore.kernel.org/r/20220815193440.388695-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts
index b34bd19..04cd3c3 100644 (file)
--- a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts
+++ b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts
@@ -365,9 +365,13 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               nfc@30 {
-                       compatible = "nxp,pn547", "nxp,nxp-nci-i2c";
-                       reg = <0x30>;
+               /* This is only mounted on the GT-I9070P */
+               nfc@2b { /* 0x30? */
+                       /* NXP NFC circuit PN544 C1 marked NXP 44501  */
+                       compatible = "nxp,pn544-i2c";
+                       /* IF0, IF1 high, gives I2C address 0x2B */
+                       reg = <0x2b>;
+                       clock-frequency = <400000>;
                        /* NFC IRQ on GPIO32 */
                        interrupt-parent = <&gpio1>;
                        interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
@@ -376,7 +380,7 @@
                        /* GPIO88 */
                        enable-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
                        pinctrl-names = "default";
-                       pinctrl-0 = <&pn547_janice_default>;
+                       pinctrl-0 = <&pn544_janice_default>;
                };
        };
 
@@ -951,7 +955,7 @@
                };
        };
        nfc {
-               pn547_janice_default: pn547_janice {
+               pn544_janice_default: pn544_janice {
                        /* Interrupt line */
                        janice_cfg1 {
                                pins = "GPIO32_V2";