compiler->min_temp_reg = ORC_VEC_REG_BASE;
+ compiler->insn_shift = compiler->loop_shift;
+ if (insn->flags & ORC_INSTRUCTION_FLAG_X2) {
+ compiler->insn_shift += 1;
+ }
+ if (insn->flags & ORC_INSTRUCTION_FLAG_X4) {
+ compiler->insn_shift += 2;
+ }
+
rule = insn->rule;
if (rule && rule->emit) {
if (!(insn->opcode->flags & (ORC_STATIC_OPCODE_ACCUMULATOR|ORC_STATIC_OPCODE_LOAD|ORC_STATIC_OPCODE_STORE)) &&
ORC_ASM_CODE(compiler,"# %d: %s\n", j, insn->opcode->name);
+ compiler->insn_shift = compiler->loop_shift;
+ if (insn->flags & ORC_INSTRUCTION_FLAG_X2) {
+ compiler->insn_shift += 1;
+ }
+ if (insn->flags & ORC_INSTRUCTION_FLAG_X4) {
+ compiler->insn_shift += 2;
+ }
+
rule = insn->rule;
if (rule && rule->emit) {
rule->emit (compiler, rule->emit_user, insn);
compiler->min_temp_reg = ORC_VEC_REG_BASE;
+ compiler->insn_shift = compiler->loop_shift;
+ if (insn->flags & ORC_INSTRUCTION_FLAG_X2) {
+ compiler->insn_shift += 1;
+ }
+ if (insn->flags & ORC_INSTRUCTION_FLAG_X4) {
+ compiler->insn_shift += 2;
+ }
+
rule = insn->rule;
if (rule && rule->emit) {
if (!(insn->opcode->flags & (ORC_STATIC_OPCODE_ACCUMULATOR|ORC_STATIC_OPCODE_LOAD|ORC_STATIC_OPCODE_STORE)) &&
ORC_ASM_CODE(compiler,"# %d: %s\n", j, insn->opcode->name);
+ compiler->insn_shift = compiler->loop_shift;
+ if (insn->flags & ORC_INSTRUCTION_FLAG_X2) {
+ compiler->insn_shift += 1;
+ }
+ if (insn->flags & ORC_INSTRUCTION_FLAG_X4) {
+ compiler->insn_shift += 2;
+ }
+
rule = insn->rule;
if (rule && rule->emit) {
rule->emit (compiler, rule->emit_user, insn);
orc_x86_emit_mov_mmx_memoffset (p, 16, p->vars[insn->src_args[1]].alloc,
offset + 16, p->exec_reg, FALSE, FALSE);
- for(i=0;i<(1<<p->loop_shift);i++) {
+ for(i=0;i<(1<<p->insn_shift);i++) {
orc_x86_emit_mov_memoffset_reg (p, 4, offset + 4*i, p->exec_reg,
p->gp_tmpreg);
orc_x86_emit_imul_memoffset_reg (p, 4, offset + 16+4*i, p->exec_reg,
orc_x86_emit_mov_reg_memoffset (p, regsize, X86_EDX, offset + 40,
p->exec_reg);
- for(i=0;i<(1<<p->loop_shift);i++) {
+ for(i=0;i<(1<<p->insn_shift);i++) {
orc_x86_emit_mov_memoffset_reg (p, 4, offset + 4*i, p->exec_reg, X86_EAX);
ORC_ASM_CODE(p," imull %d(%%%s)\n", offset + 16 + 4*i,
orc_x86_get_regname_ptr(p, p->exec_reg));
orc_x86_emit_mov_sse_memoffset (p, 16, p->vars[insn->src_args[1]].alloc,
offset + 16, p->exec_reg, FALSE, FALSE);
- for(i=0;i<(1<<p->loop_shift);i++) {
+ for(i=0;i<(1<<p->insn_shift);i++) {
orc_x86_emit_mov_memoffset_reg (p, 4, offset + 4*i, p->exec_reg,
p->gp_tmpreg);
orc_x86_emit_imul_memoffset_reg (p, 4, offset + 16+4*i, p->exec_reg,
orc_x86_emit_mov_reg_memoffset (p, regsize, X86_EDX, offset + 40,
p->exec_reg);
- for(i=0;i<(1<<p->loop_shift);i++) {
+ for(i=0;i<(1<<p->insn_shift);i++) {
orc_x86_emit_mov_memoffset_reg (p, 4, offset + 4*i, p->exec_reg, X86_EAX);
ORC_ASM_CODE(p," imull %d(%%%s)\n", offset + 16 + 4*i,
orc_x86_get_regname_ptr(p, p->exec_reg));