wl18xx: support PG2 version of the chip
authorIdo Reis <idor@ti.com>
Sun, 22 Apr 2012 17:45:52 +0000 (20:45 +0300)
committerLuciano Coelho <coelho@ti.com>
Thu, 7 Jun 2012 15:10:52 +0000 (18:10 +0300)
PG2 has a unique chip id. It supports similar HW quirks.

Signed-off-by: Ido Reis <idor@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>
Signed-off-by: Luciano Coelho <coelho@ti.com>
drivers/net/wireless/ti/wl18xx/main.c
drivers/net/wireless/ti/wl18xx/reg.h

index e030b12..57b4a10 100644 (file)
@@ -588,6 +588,17 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
        int ret = 0;
 
        switch (wl->chip.id) {
+       case CHIP_ID_185x_PG20:
+               wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG20)",
+                                wl->chip.id);
+               wl->sr_fw_name = WL18XX_FW_NAME;
+               /* wl18xx uses the same firmware for PLT */
+               wl->plt_fw_name = WL18XX_FW_NAME;
+               wl->quirks |= WLCORE_QUIRK_NO_ELP |
+                             WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED |
+                             WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN;
+
+               break;
        case CHIP_ID_185x_PG10:
                wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG10)",
                             wl->chip.id);
@@ -602,7 +613,6 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
                /* PG 1.0 has some problems with MCS_13, so disable it */
                wl->ht_cap[IEEE80211_BAND_2GHZ].mcs.rx_mask[1] &= ~BIT(5);
 
-               /* TODO: need to blocksize alignment for RX/TX separately? */
                break;
        default:
                wl1271_warning("unsupported chip id: 0x%x", wl->chip.id);
index 43863d3..e81f609 100644 (file)
 #define WL18XX_FW_STATUS_ADDR          0x50F8
 
 #define CHIP_ID_185x_PG10              (0x06030101)
+#define CHIP_ID_185x_PG20              (0x06030111)
 
 /*
  * Host Command Interrupt. Setting this bit masks