intel_scu_ipc: calculate divisor properly for osc clk
authorTuukka Toivonen <tuukka.toivonen@intel.com>
Fri, 9 Mar 2012 14:41:45 +0000 (16:41 +0200)
committerbuildbot <buildbot@intel.com>
Mon, 19 Mar 2012 15:01:14 +0000 (08:01 -0700)
BZ: 26932

intel_scu_ipc_osc_clk() calculates incorrectly the clock divisor.
This affects at least camera with 9.6 MHz clock in Clovertrail.
Fix it.

Change-Id: Ib35fa790346cb316288e5244f0d65d3b2accfcc4
Signed-off-by: Tuukka Toivonen <tuukka.toivonen@intel.com>
Reviewed-on: http://android.intel.com:8080/38189
Reviewed-by: Kruger, Jozef <jozef.kruger@intel.com>
Reviewed-by: Cohen, David A <david.a.cohen@intel.com>
Tested-by: Koski, Anttu <anttu.koski@intel.com>
Reviewed-by: Yang, Fei <fei.yang@intel.com>
Reviewed-by: Koski, Anttu <anttu.koski@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>
drivers/platform/x86/intel_scu_ipc.c

index 1e69b24..2749a08 100644 (file)
@@ -33,6 +33,7 @@
 #include <linux/intel_mid_pm.h>
 #include <linux/ipc_device.h>
 #include <linux/kernel.h>
+#include <linux/bitops.h>
 
 /*
  * IPC register summary
@@ -2203,8 +2204,8 @@ int intel_scu_ipc_osc_clk(u8 clk, unsigned int khz)
 #else
                base_freq = 19200;
 #endif
-               div = base_freq / khz - 1;
-               if (div >= 3 || (div + 1) * khz != base_freq)
+               div = fls(base_freq / khz) - 1;
+               if (div >= 3 || (1 << div) * khz != base_freq)
                        return -EINVAL; /* Allow only exact frequencies */
                ipc_wbuf[1] = 0x03 | (div << 2);
        }