iio: temp: ltc2983: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:57:10 +0000 (18:57 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:19 +0000 (11:53 +0100)
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: f110f3188e56 ("iio: temperature: Add support for LTC2983")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-91-jic23@kernel.org
drivers/iio/temperature/ltc2983.c

index 4fc6542..4b7f2b8 100644 (file)
@@ -204,11 +204,11 @@ struct ltc2983_data {
        u8 num_channels;
        u8 iio_channels;
        /*
-        * DMA (thus cache coherency maintenance) requires the
+        * DMA (thus cache coherency maintenance) may require the
         * transfer buffers to live in their own cache lines.
         * Holds the converted temperature
         */
-       __be32 temp ____cacheline_aligned;
+       __be32 temp __aligned(IIO_DMA_MINALIGN);
 };
 
 struct ltc2983_sensor {