/*
- * linux/arch/arm/plat-omap/cpu-omap.c
- *
* CPU frequency scaling for OMAP
*
* Copyright (C) 2005 Nokia Corporation
*
* Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
*
+ * Copyright (C) 2007-2011 Texas Instruments, Inc.
+ * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/io.h>
+#include <linux/opp.h>
-#include <mach/hardware.h>
-#include <plat/clock.h>
#include <asm/system.h>
+#include <asm/smp_plat.h>
-#define VERY_HI_RATE 900000000
+#include <plat/clock.h>
+#include <plat/omap-pm.h>
+#include <plat/common.h>
-static struct cpufreq_frequency_table *freq_table;
+#include <mach/hardware.h>
-#ifdef CONFIG_ARCH_OMAP1
-#define MPU_CLK "mpu"
-#else
-#define MPU_CLK "virt_prcm_set"
-#endif
+#define VERY_HI_RATE 900000000
+static struct cpufreq_frequency_table *freq_table;
static struct clk *mpu_clk;
-/* TODO: Add support for SDRAM timing changes */
-
static int omap_verify_speed(struct cpufreq_policy *policy)
{
if (freq_table)
unsigned int target_freq,
unsigned int relation)
{
- struct cpufreq_freqs freqs;
int ret = 0;
+ struct cpufreq_freqs freqs;
/* Ensure desired rate is within allowed range. Some govenors
* (ondemand) will just pass target_freq=0 to get the minimum. */
return ret;
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
#ifdef CONFIG_CPU_FREQ_DEBUG
- printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n",
- freqs.old, freqs.new);
+ pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new);
#endif
+
ret = clk_set_rate(mpu_clk, freqs.new * 1000);
+
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
return ret;
static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
{
int result = 0;
+ struct device *mpu_dev;
+
+ if (cpu_is_omap24xx())
+ mpu_clk = clk_get(NULL, "virt_prcm_set");
+ else if (cpu_is_omap34xx())
+ mpu_clk = clk_get(NULL, "dpll1_ck");
+ else if (cpu_is_omap44xx())
+ mpu_clk = clk_get(NULL, "dpll_mpu_ck");
- mpu_clk = clk_get(NULL, MPU_CLK);
if (IS_ERR(mpu_clk))
return PTR_ERR(mpu_clk);
policy->cur = policy->min = policy->max = omap_getspeed(0);
- clk_init_cpufreq_table(&freq_table);
+ mpu_dev = omap2_get_mpuss_device();
+ if (!mpu_dev) {
+ pr_warning("%s: unable to get the mpu device\n", __func__);
+ return -EINVAL;
+ }
+ opp_init_cpufreq_table(mpu_dev, &freq_table);
+
if (freq_table) {
result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
if (!result)
VERY_HI_RATE) / 1000;
}
+ policy->min = policy->cpuinfo.min_freq;
+ policy->max = policy->cpuinfo.max_freq;
+ policy->cur = omap_getspeed(0);
+
/* FIXME: what's the actual transition time? */
policy->cpuinfo.transition_latency = 300 * 1000;
return cpufreq_register_driver(&omap_driver);
}
-arch_initcall(omap_cpufreq_init);
-
-/*
- * if ever we want to remove this, upon cleanup call:
- *
- * cpufreq_unregister_driver()
- * cpufreq_frequency_table_put_attr()
- */
+static void __exit omap_cpufreq_exit(void)
+{
+ cpufreq_unregister_driver(&omap_driver);
+}
+MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs");
+MODULE_LICENSE("GPL");
+module_init(omap_cpufreq_init);
+module_exit(omap_cpufreq_exit);