define i32 @masked_bit_set(i32 %x, i32 %y) {
; CHECK-LABEL: @masked_bit_set(
; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = and i32 [[TMP1]], 1
+; CHECK-NEXT: ret i32 [[R]]
;
%sh1 = shl i32 1, %y
%and = and i32 %sh1, %x
; CHECK-LABEL: @masked_bit_clear(
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X:%.*]], <i32 -1, i32 -1>
; CHECK-NEXT: [[TMP2:%.*]] = lshr <2 x i32> [[TMP1]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = and <2 x i32> [[TMP2]], <i32 1, i32 1>
-; CHECK-NEXT: ret <2 x i32> [[TMP3]]
+; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[TMP2]], <i32 1, i32 1>
+; CHECK-NEXT: ret <2 x i32> [[R]]
;
%sh1 = shl <2 x i32> <i32 1, i32 1>, %y
%and = and <2 x i32> %sh1, %x
; CHECK-LABEL: @masked_bit_set_commute(
; CHECK-NEXT: [[X:%.*]] = srem <2 x i32> <i32 42, i32 3>, [[PX:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i32> [[X]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
-; CHECK-NEXT: ret <2 x i32> [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
+; CHECK-NEXT: ret <2 x i32> [[R]]
;
%x = srem <2 x i32> <i32 42, i32 3>, %px ; thwart complexity-based canonicalization
%sh1 = shl <2 x i32> <i32 1, i32 1>, %y
; CHECK-NEXT: [[X:%.*]] = srem i32 42, [[PX:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X]], -1
; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP2]], 1
-; CHECK-NEXT: ret i32 [[TMP3]]
+; CHECK-NEXT: [[R:%.*]] = and i32 [[TMP2]], 1
+; CHECK-NEXT: ret i32 [[R]]
;
%x = srem i32 42, %px ; thwart complexity-based canonicalization
%sh1 = shl i32 1, %y
; CHECK-NEXT: [[SH1:%.*]] = shl nuw i32 1, [[Y:%.*]]
; CHECK-NEXT: call void @use32(i32 [[SH1]])
; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], [[Y]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = and i32 [[TMP1]], 1
+; CHECK-NEXT: ret i32 [[R]]
;
%sh1 = shl i32 1, %y
call void @use32(i32 %sh1)
; CHECK-NEXT: call void @use32(i32 [[SH1]])
; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], -1
; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP1]], [[Y]]
-; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP2]], 1
-; CHECK-NEXT: ret i32 [[TMP3]]
+; CHECK-NEXT: [[R:%.*]] = and i32 [[TMP2]], 1
+; CHECK-NEXT: ret i32 [[R]]
;
%sh1 = shl i32 1, %y
call void @use32(i32 %sh1)
%z = zext i32 %a to i64
ret i64 %z
}
+
+define i16 @zext_icmp_eq0_pow2(i32 %x) {
+; CHECK-LABEL: @zext_icmp_eq0_pow2(
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i16
+; CHECK-NEXT: [[TMP2:%.*]] = lshr i16 [[TMP1]], 2
+; CHECK-NEXT: [[TMP3:%.*]] = and i16 [[TMP2]], 1
+; CHECK-NEXT: [[Z:%.*]] = xor i16 [[TMP3]], 1
+; CHECK-NEXT: ret i16 [[Z]]
+;
+ %m = and i32 %x, 4
+ %i = icmp eq i32 %m, 0
+ %z = zext i1 %i to i16
+ ret i16 %z
+}
+
+define i16 @zext_icmp_eq0_pow2_use1(i32 %x) {
+; CHECK-LABEL: @zext_icmp_eq0_pow2_use1(
+; CHECK-NEXT: [[M:%.*]] = and i32 [[X:%.*]], 4
+; CHECK-NEXT: call void @use32(i32 [[M]])
+; CHECK-NEXT: [[M_LOBIT:%.*]] = lshr exact i32 [[M]], 2
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[M_LOBIT]] to i16
+; CHECK-NEXT: [[Z:%.*]] = xor i16 [[TMP1]], 1
+; CHECK-NEXT: ret i16 [[Z]]
+;
+ %m = and i32 %x, 4
+ call void @use32(i32 %m)
+ %i = icmp eq i32 %m, 0
+ %z = zext i1 %i to i16
+ ret i16 %z
+}
+
+define i16 @zext_icmp_eq0_pow2_use2(i32 %x) {
+; CHECK-LABEL: @zext_icmp_eq0_pow2_use2(
+; CHECK-NEXT: [[M:%.*]] = and i32 [[X:%.*]], 4
+; CHECK-NEXT: [[I:%.*]] = icmp eq i32 [[M]], 0
+; CHECK-NEXT: call void @use1(i1 [[I]])
+; CHECK-NEXT: [[M_LOBIT:%.*]] = lshr exact i32 [[M]], 2
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[M_LOBIT]] to i16
+; CHECK-NEXT: [[Z:%.*]] = xor i16 [[TMP1]], 1
+; CHECK-NEXT: ret i16 [[Z]]
+;
+ %m = and i32 %x, 4
+ %i = icmp eq i32 %m, 0
+ call void @use1(i1 %i)
+ %z = zext i1 %i to i16
+ ret i16 %z
+}