net: phy: realtek: Add optional external PHY clock
authorDetlev Casanova <detlev.casanova@collabora.com>
Mon, 5 Jun 2023 15:40:08 +0000 (11:40 -0400)
committerDavid S. Miller <davem@davemloft.net>
Wed, 7 Jun 2023 08:52:24 +0000 (09:52 +0100)
In some cases, the PHY can use an external clock source instead of a
crystal.

Add an optional clock in the phy node to make sure that the clock source
is enabled, if specified, before probing.

Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/phy/realtek.c

index 3d99fd6..b13dd0b 100644 (file)
@@ -12,6 +12,7 @@
 #include <linux/phy.h>
 #include <linux/module.h>
 #include <linux/delay.h>
+#include <linux/clk.h>
 
 #define RTL821x_PHYSR                          0x11
 #define RTL821x_PHYSR_DUPLEX                   BIT(13)
@@ -80,6 +81,7 @@ struct rtl821x_priv {
        u16 phycr1;
        u16 phycr2;
        bool has_phycr2;
+       struct clk *clk;
 };
 
 static int rtl821x_read_page(struct phy_device *phydev)
@@ -103,6 +105,11 @@ static int rtl821x_probe(struct phy_device *phydev)
        if (!priv)
                return -ENOMEM;
 
+       priv->clk = devm_clk_get_optional_enabled(dev, NULL);
+       if (IS_ERR(priv->clk))
+               return dev_err_probe(dev, PTR_ERR(priv->clk),
+                                    "failed to get phy clock\n");
+
        ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1);
        if (ret < 0)
                return ret;