[CostModel][X86] Add isnan half/float/double costs tests

diff --git a/llvm/test/Analysis/CostModel/X86/fpclassify.ll b/llvm/test/Analysis/CostModel/X86/fpclassify.ll
new file mode 100644 (file)
index 0000000..ce584b8
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/X86/fpclassify.ll
@@ -0,0 +1,98 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
+; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
+; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: opt < %s -mtriple=x86_64-apple-macosx10.8.0 -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512
+
+declare i1 @llvm.isnan.f16(half)
+declare <4 x i1> @llvm.isnan.v4f16(<4 x half>)
+declare <8 x i1> @llvm.isnan.v8f16(<8 x half>)
+declare <16 x i1> @llvm.isnan.v16f16(<16 x half>)
+declare <32 x i1> @llvm.isnan.v32f16(<32 x half>)
+
+declare i1 @llvm.isnan.f32(float)
+declare <2 x i1> @llvm.isnan.v2f32(<2 x float>)
+declare <4 x i1> @llvm.isnan.v4f32(<4 x float>)
+declare <8 x i1> @llvm.isnan.v8f32(<8 x float>)
+declare <16 x i1> @llvm.isnan.v16f32(<16 x float>)
+
+declare i1 @llvm.isnan.f64(double)
+declare <2 x i1> @llvm.isnan.v2f64(<2 x double>)
+declare <4 x i1> @llvm.isnan.v4f64(<4 x double>)
+declare <8 x i1> @llvm.isnan.v8f64(<8 x double>)
+declare <16 x i1> @llvm.isnan.v16f64(<16 x double>)
+
+define i32 @isnan(i32 %arg) {
+; SSE-LABEL: 'isnan'
+; SSE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %F16 = call i1 @llvm.isnan.f16(half undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V4F16 = call <4 x i1> @llvm.isnan.v4f16(<4 x half> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8F16 = call <8 x i1> @llvm.isnan.v8f16(<8 x half> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 47 for instruction: %V16F16 = call <16 x i1> @llvm.isnan.v16f16(<16 x half> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 94 for instruction: %V3216 = call <32 x i1> @llvm.isnan.v32f16(<32 x half> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %F32 = call i1 @llvm.isnan.f32(float undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V2F32 = call <2 x i1> @llvm.isnan.v2f32(<2 x float> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V4F32 = call <4 x i1> @llvm.isnan.v4f32(<4 x float> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8F32 = call <8 x i1> @llvm.isnan.v8f32(<8 x float> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 47 for instruction: %V16F32 = call <16 x i1> @llvm.isnan.v16f32(<16 x float> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %F64 = call i1 @llvm.isnan.f64(double undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V2F64 = call <2 x i1> @llvm.isnan.v2f64(<2 x double> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V4F64 = call <4 x i1> @llvm.isnan.v4f64(<4 x double> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = call <8 x i1> @llvm.isnan.v8f64(<8 x double> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 47 for instruction: %V16F64 = call <16 x i1> @llvm.isnan.v16f64(<16 x double> undef)
+; SSE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
+; AVX-LABEL: 'isnan'
+; AVX-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %F16 = call i1 @llvm.isnan.f16(half undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V4F16 = call <4 x i1> @llvm.isnan.v4f16(<4 x half> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8F16 = call <8 x i1> @llvm.isnan.v8f16(<8 x half> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16F16 = call <16 x i1> @llvm.isnan.v16f16(<16 x half> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 66 for instruction: %V3216 = call <32 x i1> @llvm.isnan.v32f16(<32 x half> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %F32 = call i1 @llvm.isnan.f32(float undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = call <2 x i1> @llvm.isnan.v2f32(<2 x float> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V4F32 = call <4 x i1> @llvm.isnan.v4f32(<4 x float> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8F32 = call <8 x i1> @llvm.isnan.v8f32(<8 x float> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16F32 = call <16 x i1> @llvm.isnan.v16f32(<16 x float> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %F64 = call i1 @llvm.isnan.f64(double undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = call <2 x i1> @llvm.isnan.v2f64(<2 x double> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V4F64 = call <4 x i1> @llvm.isnan.v4f64(<4 x double> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = call <8 x i1> @llvm.isnan.v8f64(<8 x double> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16F64 = call <16 x i1> @llvm.isnan.v16f64(<16 x double> undef)
+; AVX-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
+; AVX512-LABEL: 'isnan'
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %F16 = call i1 @llvm.isnan.f16(half undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V4F16 = call <4 x i1> @llvm.isnan.v4f16(<4 x half> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8F16 = call <8 x i1> @llvm.isnan.v8f16(<8 x half> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16F16 = call <16 x i1> @llvm.isnan.v16f16(<16 x half> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V3216 = call <32 x i1> @llvm.isnan.v32f16(<32 x half> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %F32 = call i1 @llvm.isnan.f32(float undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = call <2 x i1> @llvm.isnan.v2f32(<2 x float> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V4F32 = call <4 x i1> @llvm.isnan.v4f32(<4 x float> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8F32 = call <8 x i1> @llvm.isnan.v8f32(<8 x float> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16F32 = call <16 x i1> @llvm.isnan.v16f32(<16 x float> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %F64 = call i1 @llvm.isnan.f64(double undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = call <2 x i1> @llvm.isnan.v2f64(<2 x double> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V4F64 = call <4 x i1> @llvm.isnan.v4f64(<4 x double> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = call <8 x i1> @llvm.isnan.v8f64(<8 x double> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V16F64 = call <16 x i1> @llvm.isnan.v16f64(<16 x double> undef)
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
+  %F16 = call i1 @llvm.isnan.f16(half undef)
+  %V4F16 = call <4 x i1> @llvm.isnan.v4f16(<4 x half> undef)
+  %V8F16 = call <8 x i1> @llvm.isnan.v8f16(<8 x half> undef)
+  %V16F16 = call <16 x i1> @llvm.isnan.v16f16(<16 x half> undef)
+  %V3216 = call <32 x i1> @llvm.isnan.v32f16(<32 x half> undef)
+
+  %F32 = call i1 @llvm.isnan.f32(float undef)
+  %V2F32 = call <2 x i1> @llvm.isnan.v2f32(<2 x float> undef)
+  %V4F32 = call <4 x i1> @llvm.isnan.v4f32(<4 x float> undef)
+  %V8F32 = call <8 x i1> @llvm.isnan.v8f32(<8 x float> undef)
+  %V16F32 = call <16 x i1> @llvm.isnan.v16f32(<16 x float> undef)
+
+  %F64 = call i1 @llvm.isnan.f64(double undef)
+  %V2F64 = call <2 x i1> @llvm.isnan.v2f64(<2 x double> undef)
+  %V4F64 = call <4 x i1> @llvm.isnan.v4f64(<4 x double> undef)
+  %V8F64 = call <8 x i1> @llvm.isnan.v8f64(<8 x double> undef)
+  %V16F64 = call <16 x i1> @llvm.isnan.v16f64(<16 x double> undef)
+
+  ret i32 undef
+}