KVM: x86: announce KVM_FEATURE_ASYNC_PF_INT

Introduce new capability to indicate that KVM supports interrupt based
delivery of 'page ready' APF events. This includes support for both
MSR_KVM_ASYNC_PF_INT and MSR_KVM_ASYNC_PF_ACK.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20200525144125.143875-8-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/Documentation/virt/kvm/cpuid.rst b/Documentation/virt/kvm/cpuid.rst
index f721c89..a7dff91 100644 (file)
--- a/Documentation/virt/kvm/cpuid.rst
+++ b/Documentation/virt/kvm/cpuid.rst
@@ -86,6 +86,12 @@ KVM_FEATURE_PV_SCHED_YIELD        13          guest checks this feature bit
                                               before using paravirtualized
                                               sched yield.
 
+KVM_FEATURE_ASYNC_PF_INT          14          guest checks this feature bit
+                                              before using the second async
+                                              pf control msr 0x4b564d06 and
+                                              async pf acknowledgment msr
+                                              0x4b564d07.
+
 KVM_FEATURE_CLOCSOURCE_STABLE_BIT 24          host will warn if no guest-side
                                               per-cpu warps are expeced in
                                               kvmclock

diff --git a/Documentation/virt/kvm/msr.rst b/Documentation/virt/kvm/msr.rst
index 9b10788..e37a14c 100644 (file)
--- a/Documentation/virt/kvm/msr.rst
+++ b/Documentation/virt/kvm/msr.rst
@@ -213,7 +213,8 @@ data:
        cpl == 0. Bit 2 is 1 if asynchronous page faults are delivered to L1 as
        #PF vmexits.  Bit 2 can be set only if KVM_FEATURE_ASYNC_PF_VMEXIT is
        present in CPUID. Bit 3 enables interrupt based delivery of 'page ready'
-       events.
+       events. Bit 3 can only be set if KVM_FEATURE_ASYNC_PF_INT is present in
+       CPUID.
 
        'Page not present' events are currently always delivered as synthetic
        #PF exception. During delivery of these events APF CR2 register contains
@@ -242,7 +243,8 @@ data:
 
        Note, MSR_KVM_ASYNC_PF_INT MSR specifying the interrupt vector for 'page
        ready' APF delivery needs to be written to before enabling APF mechanism
-       in MSR_KVM_ASYNC_PF_EN or interrupt #0 can get injected.
+       in MSR_KVM_ASYNC_PF_EN or interrupt #0 can get injected. The MSR is
+       available if KVM_FEATURE_ASYNC_PF_INT is present in CPUID.
 
        Note, previously, 'page ready' events were delivered via the same #PF
        exception as 'page not present' events but this is now deprecated. If
@@ -360,7 +362,8 @@ data:
 
        Interrupt vector for asynchnonous 'page ready' notifications delivery.
        The vector has to be set up before asynchronous page fault mechanism
-       is enabled in MSR_KVM_ASYNC_PF_EN.
+       is enabled in MSR_KVM_ASYNC_PF_EN.  The MSR is only available if
+       KVM_FEATURE_ASYNC_PF_INT is present in CPUID.
 
 MSR_KVM_ASYNC_PF_ACK:
        0x4b564d07
@@ -371,4 +374,5 @@ data:
        When the guest is done processing 'page ready' APF event and 'token'
        field in 'struct kvm_vcpu_pv_apf_data' is cleared it is supposed to
        write '1' to bit 0 of the MSR, this causes the host to re-scan its queue
-       and check if there are more notifications pending.
+       and check if there are more notifications pending. The MSR is available
+       if KVM_FEATURE_ASYNC_PF_INT is present in CPUID.

diff --git a/arch/x86/include/uapi/asm/kvm_para.h b/arch/x86/include/uapi/asm/kvm_para.h
index 7ac20df..812e9b4 100644 (file)
--- a/arch/x86/include/uapi/asm/kvm_para.h
+++ b/arch/x86/include/uapi/asm/kvm_para.h
@@ -31,6 +31,7 @@
 #define KVM_FEATURE_PV_SEND_IPI        11
 #define KVM_FEATURE_POLL_CONTROL       12
 #define KVM_FEATURE_PV_SCHED_YIELD     13
+#define KVM_FEATURE_ASYNC_PF_INT       14
 
 #define KVM_HINTS_REALTIME      0
 

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index cd708b0..a9f1905 100644 (file)
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -711,7 +711,8 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
                             (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
                             (1 << KVM_FEATURE_PV_SEND_IPI) |
                             (1 << KVM_FEATURE_POLL_CONTROL) |
-                            (1 << KVM_FEATURE_PV_SCHED_YIELD);
+                            (1 << KVM_FEATURE_PV_SCHED_YIELD) |
+                            (1 << KVM_FEATURE_ASYNC_PF_INT);
 
                if (sched_info_on())
                        entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c9d709a..ae3a7f2 100644 (file)
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -3446,6 +3446,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
        case KVM_CAP_X86_ROBUST_SINGLESTEP:
        case KVM_CAP_XSAVE:
        case KVM_CAP_ASYNC_PF:
+       case KVM_CAP_ASYNC_PF_INT:
        case KVM_CAP_GET_TSC_KHZ:
        case KVM_CAP_KVMCLOCK_CTRL:
        case KVM_CAP_READONLY_MEM:

diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index ac9eba0..fc00759 100644 (file)
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -1018,6 +1018,7 @@ struct kvm_ppc_resize_hpt {
 #define KVM_CAP_S390_PROTECTED 180
 #define KVM_CAP_PPC_SECURE_GUEST 181
 #define KVM_CAP_HALT_POLL 182
+#define KVM_CAP_ASYNC_PF_INT 183
 
 #ifdef KVM_CAP_IRQ_ROUTING