riscv: dts: allwinner: Add Dongshan Nezha STU devicetree

The 100ask Dongshan Nezha STU is a system-on-module that can be used
standalone or with a carrier board. The SoM provides gigabit Ethernet,
HDMI, a USB peripheral port, and WiFi/Bluetooth via an RTL8723DS chip.

The "DIY" carrier board exposes almost every pin from the D1 SoC to 0.1"
headers, but contains no digital circuitry, so it does not have its own
devicetree.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230126045738.47903-10-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>

diff --git a/arch/riscv/boot/dts/allwinner/Makefile b/arch/riscv/boot/dts/allwinner/Makefile
index 2ed586f..87f70b1 100644 (file)
--- a/arch/riscv/boot/dts/allwinner/Makefile
+++ b/arch/riscv/boot/dts/allwinner/Makefile
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-dongshan-nezha-stu.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-480p.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-720p.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-dock.dtb

diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts
new file mode 100644 (file)
index 0000000..8785de3
--- /dev/null
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/dts-v1/;
+
+#include "sun20i-d1.dtsi"
+#include "sun20i-common-regulators.dtsi"
+
+/ {
+       model = "Dongshan Nezha STU";
+       compatible = "100ask,dongshan-nezha-stu", "allwinner,sun20i-d1";
+
+       aliases {
+               ethernet0 = &emac;
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led-0 {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_STATUS;
+                       gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */
+               };
+       };
+
+       reg_usbvbus: usbvbus {
+               compatible = "regulator-fixed";
+               regulator-name = "usbvbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
+               enable-active-high;
+               vin-supply = <&reg_vcc>;
+       };
+
+       /*
+        * This regulator is PWM-controlled, but the PWM controller is not
+        * yet supported, so fix the regulator to its default voltage.
+        */
+       reg_vdd_cpu: vdd-cpu {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd-cpu";
+               regulator-min-microvolt = <1100000>;
+               regulator-max-microvolt = <1100000>;
+               vin-supply = <&reg_vcc>;
+       };
+};
+
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpu>;
+};
+
+&dcxo {
+       clock-frequency = <24000000>;
+};
+
+&ehci0 {
+       status = "okay";
+};
+
+&emac {
+       pinctrl-0 = <&rgmii_pe_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&ext_rgmii_phy>;
+       phy-mode = "rgmii-id";
+       phy-supply = <&reg_vcc_3v3>;
+       status = "okay";
+};
+
+&mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};
+
+&mmc0 {
+       broken-cd;
+       bus-width = <4>;
+       disable-wp;
+       vmmc-supply = <&reg_vcc_3v3>;
+       vqmmc-supply = <&reg_vcc_3v3>;
+       pinctrl-0 = <&mmc0_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&ohci0 {
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-0 = <&uart0_pb8_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&usb_otg {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&usbphy {
+       usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
+       usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
+       usb0_vbus-supply = <&reg_usbvbus>;
+       status = "okay";
+};