drm/i915/rpl-p: Add PCI IDs
authorMatt Atwood <matthew.s.atwood@intel.com>
Mon, 18 Apr 2022 06:21:57 +0000 (11:51 +0530)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 20 Apr 2022 00:14:09 +0000 (17:14 -0700)
Adding initial PCI ids for RPL-P.
RPL-P behaves identically to ADL-P from i915's point of view.

Changes since V1 :
- SUBPLATFORM ADL_N and RPL_P clash as both are ADLP
  based - Matthew R

Bspec: 55376
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
[mattrope: Corrected comment formatting to match coding style]
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220418062157.2974665-1-tejaskumarx.surendrakumar.upadhyay@intel.com
arch/x86/kernel/early-quirks.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.c
drivers/gpu/drm/i915/intel_device_info.h
include/drm/i915_pciids.h

index 8055967..a6c1867 100644 (file)
@@ -558,6 +558,7 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
        INTEL_ADLP_IDS(&gen11_early_ops),
        INTEL_ADLN_IDS(&gen11_early_ops),
        INTEL_RPLS_IDS(&gen11_early_ops),
+       INTEL_RPLP_IDS(&gen11_early_ops),
 };
 
 struct resource intel_graphics_stolen_res __ro_after_init = DEFINE_RES_MEM(0, 0);
index ce2cd64..3711d61 100644 (file)
@@ -1054,9 +1054,11 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_DG2_G12(dev_priv) \
        IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G12)
 #define IS_ADLS_RPLS(dev_priv) \
-       IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL_S)
+       IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL)
 #define IS_ADLP_N(dev_priv) \
        IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
+#define IS_ADLP_RPLP(dev_priv) \
+       IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
                                    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
 #define IS_BDW_ULT(dev_priv) \
index 9e07792..f59e526 100644 (file)
@@ -1151,6 +1151,7 @@ static const struct pci_device_id pciidlist[] = {
        INTEL_ADLN_IDS(&adl_p_info),
        INTEL_DG1_IDS(&dg1_info),
        INTEL_RPLS_IDS(&adl_s_info),
+       INTEL_RPLP_IDS(&adl_p_info),
        {0, 0, 0}
 };
 MODULE_DEVICE_TABLE(pci, pciidlist);
index 41a5b98..74c3ffb 100644 (file)
@@ -181,8 +181,9 @@ static const u16 subplatform_n_ids[] = {
        INTEL_ADLN_IDS(0),
 };
 
-static const u16 subplatform_rpls_ids[] = {
+static const u16 subplatform_rpl_ids[] = {
        INTEL_RPLS_IDS(0),
+       INTEL_RPLP_IDS(0),
 };
 
 static bool find_devid(u16 id, const u16 *p, unsigned int num)
@@ -227,9 +228,9 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915)
        } else if (find_devid(devid, subplatform_n_ids,
                                ARRAY_SIZE(subplatform_n_ids))) {
                mask = BIT(INTEL_SUBPLATFORM_N);
-       } else if (find_devid(devid, subplatform_rpls_ids,
-                             ARRAY_SIZE(subplatform_rpls_ids))) {
-               mask = BIT(INTEL_SUBPLATFORM_RPL_S);
+       } else if (find_devid(devid, subplatform_rpl_ids,
+                             ARRAY_SIZE(subplatform_rpl_ids))) {
+               mask = BIT(INTEL_SUBPLATFORM_RPL);
        }
 
        GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);
index f9b9558..4053efa 100644 (file)
@@ -114,11 +114,16 @@ enum intel_platform {
 #define INTEL_SUBPLATFORM_G11  1
 #define INTEL_SUBPLATFORM_G12  2
 
-/* ADL-S */
-#define INTEL_SUBPLATFORM_RPL_S        0
+/* ADL */
+#define INTEL_SUBPLATFORM_RPL  0
 
 /* ADL-P */
-#define INTEL_SUBPLATFORM_N    0
+/*
+ * As #define INTEL_SUBPLATFORM_RPL 0 will apply
+ * here too, SUBPLATFORM_N will have different
+ * bit set
+ */
+#define INTEL_SUBPLATFORM_N    1
 
 enum intel_ppgtt_type {
        INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
index 0800dc8..a7b5eea 100644 (file)
        INTEL_VGA_DEVICE(0xA78A, info), \
        INTEL_VGA_DEVICE(0xA78B, info)
 
+/* RPL-P */
+#define INTEL_RPLP_IDS(info) \
+       INTEL_VGA_DEVICE(0xA720, info), \
+       INTEL_VGA_DEVICE(0xA721, info), \
+       INTEL_VGA_DEVICE(0xA7A0, info), \
+       INTEL_VGA_DEVICE(0xA7A1, info), \
+       INTEL_VGA_DEVICE(0xA7A8, info), \
+       INTEL_VGA_DEVICE(0xA7A9, info)
+
 #endif /* _I915_PCIIDS_H */