ARM: ux500: fix I2C4 clock bit
authorLinus Walleij <linus.walleij@linaro.org>
Fri, 18 Oct 2013 08:39:58 +0000 (10:39 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 18 Oct 2013 12:55:43 +0000 (14:55 +0200)
The PCLK for I2C4 is controlled by bit 10 in the PCKEN registers
while the KCLK is controlled by bit 9 on the KCKEN, it's
one of these odd assymetric things. Correct the PCLK bit to 10.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/ste-dbx5x0.dtsi

index 5112f4c..0fc634b 100644 (file)
 
                        clock-frequency = <400000>;
 
-                       clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>;
+                       clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>;
                        clock-names = "i2cclk", "apb_pclk";
                };