vpu: fix mem_pd reg addr mistake [1/1]

PD#SWPL-5857

Problem:
vpu_mem_pd register address changed

Solution:
update vpu_mem_pd register address for sm1

Verify:
pxp

Change-Id: Iefcb190b40a5ac949351a4c88bea502e437cd59f
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>

diff --git a/drivers/amlogic/media/common/vpu/vpu.c b/drivers/amlogic/media/common/vpu/vpu.c
index 1ff826f..a1dbda0 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu.c
+++ b/drivers/amlogic/media/common/vpu/vpu.c
@@ -790,8 +790,16 @@ static ssize_t vpu_mem_debug(struct class *class, struct class_attribute *attr,
        _reg0 = HHI_VPU_MEM_PD_REG0;
        _reg1 = HHI_VPU_MEM_PD_REG1;
        _reg2 = HHI_VPU_MEM_PD_REG2;
-       _reg3 = HHI_VPU_MEM_PD_REG3;
-       _reg4 = HHI_VPU_MEM_PD_REG4;
+       switch (vpu_conf.data->chip_type) {
+       case VPU_CHIP_SM1:
+               _reg3 = HHI_VPU_MEM_PD_REG3_SM1;
+               _reg4 = HHI_VPU_MEM_PD_REG4_SM1;
+               break;
+       default:
+               _reg3 = HHI_VPU_MEM_PD_REG3;
+               _reg4 = HHI_VPU_MEM_PD_REG4;
+               break;
+       }
        switch (buf[0]) {
        case 'r':
                VPUPR("mem_pd0: 0x%08x\n", vpu_hiu_read(_reg0));
@@ -800,9 +808,9 @@ static ssize_t vpu_mem_debug(struct class *class, struct class_attribute *attr,
                if (vpu_conf.data->mem_pd_reg2_valid)
                        VPUPR("mem_pd2: 0x%08x\n", vpu_hiu_read(_reg2));
                if (vpu_conf.data->mem_pd_reg3_valid)
-                       VPUPR("mem_pd2: 0x%08x\n", vpu_hiu_read(_reg3));
+                       VPUPR("mem_pd3: 0x%08x\n", vpu_hiu_read(_reg3));
                if (vpu_conf.data->mem_pd_reg4_valid)
-                       VPUPR("mem_pd2: 0x%08x\n", vpu_hiu_read(_reg4));
+                       VPUPR("mem_pd4: 0x%08x\n", vpu_hiu_read(_reg4));
                break;
        case 'w':
                ret = sscanf(buf, "w %u %u", &tmp[0], &tmp[1]);
@@ -940,6 +948,7 @@ static ssize_t vpu_print_debug(struct class *class,
 static ssize_t vpu_debug_info(struct class *class,
                struct class_attribute *attr, char *buf)
 {
+       unsigned int _reg0, _reg1, _reg2, _reg3, _reg4;
        unsigned int level_max, clk;
        ssize_t len = 0;
        int ret;
@@ -953,6 +962,20 @@ static ssize_t vpu_debug_info(struct class *class,
                return len;
        }
 
+       _reg0 = HHI_VPU_MEM_PD_REG0;
+       _reg1 = HHI_VPU_MEM_PD_REG1;
+       _reg2 = HHI_VPU_MEM_PD_REG2;
+       switch (vpu_conf.data->chip_type) {
+       case VPU_CHIP_SM1:
+               _reg3 = HHI_VPU_MEM_PD_REG3_SM1;
+               _reg4 = HHI_VPU_MEM_PD_REG4_SM1;
+               break;
+       default:
+               _reg3 = HHI_VPU_MEM_PD_REG3;
+               _reg4 = HHI_VPU_MEM_PD_REG4;
+               break;
+       }
+
        clk = get_vpu_clk();
        level_max = vpu_conf.data->clk_level_max - 1;
 
@@ -972,22 +995,22 @@ static ssize_t vpu_debug_info(struct class *class,
 
        len += sprintf(buf+len, "mem_pd:\n"
                "  mem_pd0:      0x%08x\n",
-               vpu_hiu_read(HHI_VPU_MEM_PD_REG0));
+               vpu_hiu_read(_reg0));
        if (vpu_conf.data->mem_pd_reg1_valid) {
                len += sprintf(buf+len, "  mem_pd1:      0x%08x\n",
-                       vpu_hiu_read(HHI_VPU_MEM_PD_REG1));
+                       vpu_hiu_read(_reg1));
        }
        if (vpu_conf.data->mem_pd_reg2_valid) {
                len += sprintf(buf+len, "  mem_pd2:      0x%08x\n",
-                       vpu_hiu_read(HHI_VPU_MEM_PD_REG2));
+                       vpu_hiu_read(_reg2));
        }
        if (vpu_conf.data->mem_pd_reg3_valid) {
                len += sprintf(buf+len, "  mem_pd3:      0x%08x\n",
-                       vpu_hiu_read(HHI_VPU_MEM_PD_REG3));
+                       vpu_hiu_read(_reg3));
        }
        if (vpu_conf.data->mem_pd_reg4_valid) {
                len += sprintf(buf+len, "  mem_pd4:      0x%08x\n",
-                       vpu_hiu_read(HHI_VPU_MEM_PD_REG4));
+                       vpu_hiu_read(_reg4));
        }
 
 #ifdef CONFIG_VPU_DYNAMIC_ADJ

diff --git a/drivers/amlogic/media/common/vpu/vpu_ctrl.h b/drivers/amlogic/media/common/vpu/vpu_ctrl.h
index 79e3f00..10302e9 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu_ctrl.h
+++ b/drivers/amlogic/media/common/vpu/vpu_ctrl.h
@@ -451,10 +451,10 @@ static struct vpu_ctrl_s vpu_mem_pd_sm1[] = {
        {VPU_VIU2,            HHI_VPU_MEM_PD_REG2, 0x3, 22,   2},
        {VPU_DI_PRE,          HHI_VPU_MEM_PD_REG2, 0xf, 24,   4},
        {VPU_RDMA,            HHI_VPU_MEM_PD_REG2, 0x3, 30,   2},
-       {VPU_TCON,            HHI_VPU_MEM_PD_REG3, 0x3,  0,  16},
-       {VPU_TCON,            HHI_VPU_MEM_PD_REG3, 0x3, 16,  16},
-       {VPU_AXI_WR1,         HHI_VPU_MEM_PD_REG4, 0x3,  0,   2},
-       {VPU_AXI_WR0,         HHI_VPU_MEM_PD_REG4, 0x3,  2,   2},
+       {VPU_TCON,            HHI_VPU_MEM_PD_REG3_SM1, 0x3,  0,  16},
+       {VPU_TCON,            HHI_VPU_MEM_PD_REG3_SM1, 0x3, 16,  16},
+       {VPU_AXI_WR1,         HHI_VPU_MEM_PD_REG4_SM1, 0x3,  0,   2},
+       {VPU_AXI_WR0,         HHI_VPU_MEM_PD_REG4_SM1, 0x3,  2,   2},
        {VPU_MOD_MAX,         VPU_REG_END,         0,    0,   0},
 };
 

diff --git a/drivers/amlogic/media/common/vpu/vpu_reg.h b/drivers/amlogic/media/common/vpu/vpu_reg.h
index d21cf95..903be7d 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu_reg.h
+++ b/drivers/amlogic/media/common/vpu/vpu_reg.h
@@ -43,6 +43,8 @@
 #define HHI_VPU_MEM_PD_REG2          0x4d
 #define HHI_VPU_MEM_PD_REG3          0x4e
 #define HHI_VPU_MEM_PD_REG4          0x4c
+#define HHI_VPU_MEM_PD_REG3_SM1      0x43
+#define HHI_VPU_MEM_PD_REG4_SM1      0x44
 
 #define HHI_VPU_CLKC_CNTL            0x6d
 #define HHI_VPU_CLK_CNTL             0x6f