*vpcidev = (QVirtioPCIDevice *)d;
}
-static uint8_t qvirtio_pci_config_readb(QVirtioDevice *d, void *addr)
+static uint8_t qvirtio_pci_config_readb(QVirtioDevice *d, uint64_t addr)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
- return qpci_io_readb(dev->pdev, addr);
+ return qpci_io_readb(dev->pdev, (void *)(uintptr_t)addr);
}
-static uint16_t qvirtio_pci_config_readw(QVirtioDevice *d, void *addr)
+static uint16_t qvirtio_pci_config_readw(QVirtioDevice *d, uint64_t addr)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
- return qpci_io_readw(dev->pdev, addr);
+ return qpci_io_readw(dev->pdev, (void *)(uintptr_t)addr);
}
-static uint32_t qvirtio_pci_config_readl(QVirtioDevice *d, void *addr)
+static uint32_t qvirtio_pci_config_readl(QVirtioDevice *d, uint64_t addr)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
- return qpci_io_readl(dev->pdev, addr);
+ return qpci_io_readl(dev->pdev, (void *)(uintptr_t)addr);
}
-static uint64_t qvirtio_pci_config_readq(QVirtioDevice *d, void *addr)
+static uint64_t qvirtio_pci_config_readq(QVirtioDevice *d, uint64_t addr)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
int i;
if (qtest_big_endian()) {
for (i = 0; i < 8; ++i) {
- u64 |= (uint64_t)qpci_io_readb(dev->pdev, addr + i) << (7 - i) * 8;
+ u64 |= (uint64_t)qpci_io_readb(dev->pdev,
+ (void *)(uintptr_t)addr + i) << (7 - i) * 8;
}
} else {
for (i = 0; i < 8; ++i) {
- u64 |= (uint64_t)qpci_io_readb(dev->pdev, addr + i) << i * 8;
+ u64 |= (uint64_t)qpci_io_readb(dev->pdev,
+ (void *)(uintptr_t)addr + i) << i * 8;
}
}
#include "libqos/virtio.h"
uint8_t qvirtio_config_readb(const QVirtioBus *bus, QVirtioDevice *d,
- void *addr)
+ uint64_t addr)
{
return bus->config_readb(d, addr);
}
uint16_t qvirtio_config_readw(const QVirtioBus *bus, QVirtioDevice *d,
- void *addr)
+ uint64_t addr)
{
return bus->config_readw(d, addr);
}
uint32_t qvirtio_config_readl(const QVirtioBus *bus, QVirtioDevice *d,
- void *addr)
+ uint64_t addr)
{
return bus->config_readl(d, addr);
}
uint64_t qvirtio_config_readq(const QVirtioBus *bus, QVirtioDevice *d,
- void *addr)
+ uint64_t addr)
{
return bus->config_readq(d, addr);
}
} QVRingIndirectDesc;
typedef struct QVirtioBus {
- uint8_t (*config_readb)(QVirtioDevice *d, void *addr);
- uint16_t (*config_readw)(QVirtioDevice *d, void *addr);
- uint32_t (*config_readl)(QVirtioDevice *d, void *addr);
- uint64_t (*config_readq)(QVirtioDevice *d, void *addr);
+ uint8_t (*config_readb)(QVirtioDevice *d, uint64_t addr);
+ uint16_t (*config_readw)(QVirtioDevice *d, uint64_t addr);
+ uint32_t (*config_readl)(QVirtioDevice *d, uint64_t addr);
+ uint64_t (*config_readq)(QVirtioDevice *d, uint64_t addr);
/* Get features of the device */
uint32_t (*get_features)(QVirtioDevice *d);
}
uint8_t qvirtio_config_readb(const QVirtioBus *bus, QVirtioDevice *d,
- void *addr);
+ uint64_t addr);
uint16_t qvirtio_config_readw(const QVirtioBus *bus, QVirtioDevice *d,
- void *addr);
+ uint64_t addr);
uint32_t qvirtio_config_readl(const QVirtioBus *bus, QVirtioDevice *d,
- void *addr);
+ uint64_t addr);
uint64_t qvirtio_config_readq(const QVirtioBus *bus, QVirtioDevice *d,
- void *addr);
+ uint64_t addr);
uint32_t qvirtio_get_features(const QVirtioBus *bus, QVirtioDevice *d);
void qvirtio_set_features(const QVirtioBus *bus, QVirtioDevice *d,
uint32_t features);
/* MSI-X is not enabled */
addr = dev->addr + QVIRTIO_DEVICE_SPECIFIC_NO_MSIX;
- capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr);
+ capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev,
+ (uint64_t)(uintptr_t)addr);
g_assert_cmpint(capacity, ==, TEST_IMAGE_SIZE / 512);
features = qvirtio_get_features(&qvirtio_pci, &dev->vdev);
/* MSI-X is not enabled */
addr = dev->addr + QVIRTIO_DEVICE_SPECIFIC_NO_MSIX;
- capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr);
+ capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev,
+ (uint64_t)(uintptr_t)addr);
g_assert_cmpint(capacity, ==, TEST_IMAGE_SIZE / 512);
features = qvirtio_get_features(&qvirtio_pci, &dev->vdev);
/* MSI-X is not enabled */
addr = dev->addr + QVIRTIO_DEVICE_SPECIFIC_NO_MSIX;
- capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr);
+ capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev,
+ (uint64_t)(uintptr_t)addr);
g_assert_cmpint(capacity, ==, TEST_IMAGE_SIZE / 512);
qvirtio_set_driver_ok(&qvirtio_pci, &dev->vdev);
" 'size': %d } }", n_size);
qvirtio_wait_config_isr(&qvirtio_pci, &dev->vdev, QVIRTIO_BLK_TIMEOUT_US);
- capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr);
+ capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev,
+ (uint64_t)(uintptr_t)addr);
g_assert_cmpint(capacity, ==, n_size / 512);
qvirtio_pci_device_disable(dev);
/* MSI-X is enabled */
addr = dev->addr + QVIRTIO_DEVICE_SPECIFIC_MSIX;
- capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr);
+ capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev,
+ (uint64_t)(uintptr_t)addr);
g_assert_cmpint(capacity, ==, TEST_IMAGE_SIZE / 512);
features = qvirtio_get_features(&qvirtio_pci, &dev->vdev);
qvirtio_wait_config_isr(&qvirtio_pci, &dev->vdev, QVIRTIO_BLK_TIMEOUT_US);
- capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr);
+ capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev,
+ (uint64_t)(uintptr_t)addr);
g_assert_cmpint(capacity, ==, n_size / 512);
/* Write request */
/* MSI-X is enabled */
addr = dev->addr + QVIRTIO_DEVICE_SPECIFIC_MSIX;
- capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev, addr);
+ capacity = qvirtio_config_readq(&qvirtio_pci, &dev->vdev,
+ (uint64_t)(uintptr_t)addr);
g_assert_cmpint(capacity, ==, TEST_IMAGE_SIZE / 512);
features = qvirtio_get_features(&qvirtio_pci, &dev->vdev);