asahi: Set data_valid with PERSISTENT or COHERENT

We won't get an unmap/flush but we could have had data already.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19606>

diff --git a/src/gallium/drivers/asahi/agx_pipe.c b/src/gallium/drivers/asahi/agx_pipe.c
index 0bedba6..5f12c4f 100644 (file)
--- a/src/gallium/drivers/asahi/agx_pipe.c
+++ b/src/gallium/drivers/asahi/agx_pipe.c
@@ -582,9 +582,11 @@ agx_transfer_map(struct pipe_context *pctx,
       transfer->base.layer_stride = rsrc->layout.layer_stride_B;
 
       /* Be conservative for direct writes */
-
-      if ((usage & PIPE_MAP_WRITE) && (usage & PIPE_MAP_DIRECTLY))
+      if ((usage & PIPE_MAP_WRITE) &&
+          (usage & (PIPE_MAP_DIRECTLY | PIPE_MAP_PERSISTENT | PIPE_MAP_COHERENT)))
+      {
          BITSET_SET(rsrc->data_valid, level);
+      }
 
       uint32_t offset = ail_get_linear_pixel_B(&rsrc->layout, level, box->x,
                                                box->y, box->z);