[ARM] 4202/2: S3C2443: IRQ sub source handlers

Add IRQ handlers for the IRQs which originate
from the sub-interrupt register on the S3C2443

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
index f705882..7a45b6d 100644 (file)
--- a/arch/arm/mach-s3c2443/irq.c
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -39,12 +39,12 @@
 #include <asm/plat-s3c24xx/pm.h>
 #include <asm/plat-s3c24xx/irq.h>
 
-/* WDT/AC97 */
+#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
 
-static void s3c_irq_demux_wdtac97(unsigned int irq,
-                                 struct irq_desc *desc)
+static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len)
 {
        unsigned int subsrc, submsk;
+       unsigned int end;
        struct irq_desc *mydesc;
 
        /* read the current pending interrupts, and the mask
@@ -53,63 +53,199 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
        subsrc = __raw_readl(S3C2410_SUBSRCPND);
        submsk = __raw_readl(S3C2410_INTSUBMSK);
 
-       subsrc &= ~submsk;
-       subsrc >>= 27;
-       subsrc &= 3;
-
-       if (subsrc != 0) {
-               if (subsrc & 1) {
-                       mydesc = irq_desc + IRQ_S3C2443_WDT;
-                       desc_handle_irq(IRQ_S3C2443_WDT, mydesc);
-               }
-               if (subsrc & 2) {
-                       mydesc = irq_desc + IRQ_S3C2443_AC97;
-                       desc_handle_irq(IRQ_S3C2443_AC97, mydesc);
-               }
+       subsrc  &= ~submsk;
+       subsrc >>= (irq - S3C2410_IRQSUB(0));
+       subsrc  &= (1 << len)-1;
+
+       end = len + irq;
+       mydesc = irq_desc + irq;
+
+       for (; irq < end && subsrc; irq++) {
+               if (subsrc & 1)
+                       desc_handle_irq(irq, mydesc);
+
+               mydesc++;
+               subsrc >>= 1;
        }
 }
 
+/* WDT/AC97 sub interrupts */
+
+static void s3c2443_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
+{
+       s3c2443_irq_demux(IRQ_S3C2443_WDT, 4);
+}
 
-#define INTMSK_WDT      (1UL << (IRQ_WDT - IRQ_EINT0))
+#define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
+#define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
 
-static void
-s3c_irq_wdtac97_mask(unsigned int irqno)
+static void s3c2443_irq_wdtac97_mask(unsigned int irqno)
 {
-       s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<27);
+       s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
 }
 
-static void
-s3c_irq_wdtac97_unmask(unsigned int irqno)
+static void s3c2443_irq_wdtac97_unmask(unsigned int irqno)
 {
-       s3c_irqsub_unmask(irqno, INTMSK_WDT);
+       s3c_irqsub_unmask(irqno, INTMSK_WDTAC97);
 }
 
-static void
-s3c_irq_wdtac97_ack(unsigned int irqno)
+static void s3c2443_irq_wdtac97_ack(unsigned int irqno)
 {
-       s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<27);
+       s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
 }
 
-static struct irq_chip s3c_irq_wdtac97 = {
-       .mask       = s3c_irq_wdtac97_mask,
-       .unmask     = s3c_irq_wdtac97_unmask,
-       .ack        = s3c_irq_wdtac97_ack,
+static struct irq_chip s3c2443_irq_wdtac97 = {
+       .mask       = s3c2443_irq_wdtac97_mask,
+       .unmask     = s3c2443_irq_wdtac97_unmask,
+       .ack        = s3c2443_irq_wdtac97_ack,
 };
 
-static int s3c2443_irq_add(struct sys_device *sysdev)
+
+/* LCD sub interrupts */
+
+static void s3c2443_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
 {
-       unsigned int irqno;
+       s3c2443_irq_demux(IRQ_S3C2443_LCD1, 4);
+}
 
-       printk("S3C2443: IRQ Support\n");
+#define INTMSK_LCD     (1UL << (IRQ_LCD - IRQ_EINT0))
+#define SUBMSK_LCD     INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
+
+static void s3c2443_irq_lcd_mask(unsigned int irqno)
+{
+       s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD);
+}
+
+static void s3c2443_irq_lcd_unmask(unsigned int irqno)
+{
+       s3c_irqsub_unmask(irqno, INTMSK_LCD);
+}
+
+static void s3c2443_irq_lcd_ack(unsigned int irqno)
+{
+       s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
+}
+
+static struct irq_chip s3c2443_irq_lcd = {
+       .mask       = s3c2443_irq_lcd_mask,
+       .unmask     = s3c2443_irq_lcd_unmask,
+       .ack        = s3c2443_irq_lcd_ack,
+};
+
+
+/* DMA sub interrupts */
+
+static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
+{
+       s3c2443_irq_demux(IRQ_S3C2443_DMA1, 6);
+}
+
+#define INTMSK_DMA     (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
+#define SUBMSK_DMA     INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
+
+
+static void s3c2443_irq_dma_mask(unsigned int irqno)
+{
+       s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA);
+}
+
+static void s3c2443_irq_dma_unmask(unsigned int irqno)
+{
+       s3c_irqsub_unmask(irqno, INTMSK_DMA);
+}
+
+static void s3c2443_irq_dma_ack(unsigned int irqno)
+{
+       s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA);
+}
+
+static struct irq_chip s3c2443_irq_dma = {
+       .mask       = s3c2443_irq_dma_mask,
+       .unmask     = s3c2443_irq_dma_unmask,
+       .ack        = s3c2443_irq_dma_ack,
+};
+
+
+/* UART3 sub interrupts */
+
+static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
+{
+       s3c2443_irq_demux(IRQ_S3C2443_UART3, 3);
+}
 
-       /* add new chained handler for wdt, ac7 */
+#define INTMSK_UART3   (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
+#define SUBMSK_UART3   (0xf << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
 
-       set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
-       set_irq_handler(IRQ_WDT, handle_level_irq);
-       set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
 
-       for (irqno = IRQ_S3C2443_WDT; irqno <= IRQ_S3C2443_AC97; irqno++) {
-               set_irq_chip(irqno, &s3c_irq_wdtac97);
+static void s3c2443_irq_uart3_mask(unsigned int irqno)
+{
+       s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3);
+}
+
+static void s3c2443_irq_uart3_unmask(unsigned int irqno)
+{
+       s3c_irqsub_unmask(irqno, INTMSK_UART3);
+}
+
+static void s3c2443_irq_uart3_ack(unsigned int irqno)
+{
+       s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3);
+}
+
+static struct irq_chip s3c2443_irq_uart3 = {
+       .mask       = s3c2443_irq_uart3_mask,
+       .unmask     = s3c2443_irq_uart3_unmask,
+       .ack        = s3c2443_irq_uart3_ack,
+};
+
+
+/* CAM sub interrupts */
+
+static void s3c2443_irq_demux_cam(unsigned int irq, struct irq_desc *desc)
+{
+       s3c2443_irq_demux(IRQ_S3C2440_CAM_C, 4);
+}
+
+#define INTMSK_CAM     (1UL << (IRQ_CAM - IRQ_EINT0))
+#define SUBMSK_CAM     INTMSK(IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P)
+
+static void s3c2443_irq_cam_mask(unsigned int irqno)
+{
+       s3c_irqsub_mask(irqno, INTMSK_CAM, SUBMSK_CAM);
+}
+
+static void s3c2443_irq_cam_unmask(unsigned int irqno)
+{
+       s3c_irqsub_unmask(irqno, INTMSK_CAM);
+}
+
+static void s3c2443_irq_cam_ack(unsigned int irqno)
+{
+       s3c_irqsub_maskack(irqno, INTMSK_CAM, SUBMSK_CAM);
+}
+
+static struct irq_chip s3c2443_irq_cam = {
+       .mask       = s3c2443_irq_cam_mask,
+       .unmask     = s3c2443_irq_cam_unmask,
+       .ack        = s3c2443_irq_cam_ack,
+};
+
+/* IRQ initialisation code */
+
+static int __init s3c2443_add_sub(unsigned int base,
+                                  void (*demux)(unsigned int,
+                                                struct irq_desc *),
+                                  struct irq_chip *chip,
+                                  unsigned int start, unsigned int end)
+{
+       unsigned int irqno;
+
+       set_irq_chip(base, &s3c_irq_level_chip);
+       set_irq_handler(base, handle_level_irq);
+       set_irq_chained_handler(base, demux);
+
+       for (irqno = start; irqno <= end; irqno++) {
+               set_irq_chip(irqno, chip);
                set_irq_handler(irqno, handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
@@ -117,6 +253,30 @@ static int s3c2443_irq_add(struct sys_device *sysdev)
        return 0;
 }
 
+static int s3c2443_irq_add(struct sys_device *sysdev)
+{
+       printk("S3C2443: IRQ Support\n");
+
+       s3c2443_add_sub(IRQ_CAM, s3c2443_irq_demux_cam, &s3c2443_irq_cam,
+                       IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P);
+
+       s3c2443_add_sub(IRQ_LCD, s3c2443_irq_demux_lcd, &s3c2443_irq_lcd,
+                       IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4);
+
+       s3c2443_add_sub(IRQ_S3C2443_DMA, s3c2443_irq_demux_dma,
+                       &s3c2443_irq_dma, IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5);
+
+       s3c2443_add_sub(IRQ_S3C2443_UART3, s3c2443_irq_demux_uart3,
+                       &s3c2443_irq_uart3,
+                       IRQ_S3C2443_RX3, IRQ_S3C2443_ERR3);
+
+       s3c2443_add_sub(IRQ_WDT, s3c2443_irq_demux_wdtac97,
+                       &s3c2443_irq_wdtac97,
+                       IRQ_S3C2443_WDT, IRQ_S3C2443_AC97);
+
+       return 0;
+}
+
 static struct sysdev_driver s3c2443_irq_driver = {
        .add            = s3c2443_irq_add,
 };