ARM: shmobile: r8a7790: Reference clocks
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Wed, 11 Dec 2013 14:05:15 +0000 (15:05 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Thu, 19 Dec 2013 11:01:33 +0000 (20:01 +0900)
Reference clocks using a "clocks" property in all nodes corresponding to
devices that require a clock.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7790.dtsi

index 8dccbe7..71ec31c 100644 (file)
                reg = <0 0xe6508000 0 0x40>;
                interrupt-parent = <&gic>;
                interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_I2C0>;
                status = "disabled";
        };
 
                reg = <0 0xe6518000 0 0x40>;
                interrupt-parent = <&gic>;
                interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_I2C1>;
                status = "disabled";
        };
 
                reg = <0 0xe6530000 0 0x40>;
                interrupt-parent = <&gic>;
                interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_I2C2>;
                status = "disabled";
        };
 
                reg = <0 0xe6540000 0 0x40>;
                interrupt-parent = <&gic>;
                interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_I2C3>;
                status = "disabled";
        };
 
                reg = <0 0xee200000 0 0x80>;
                interrupt-parent = <&gic>;
                interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
                reg-io-width = <4>;
                status = "disabled";
        };
                reg = <0 0xee220000 0 0x80>;
                interrupt-parent = <&gic>;
                interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
                reg-io-width = <4>;
                status = "disabled";
        };
                reg = <0 0xee100000 0 0x100>;
                interrupt-parent = <&gic>;
                interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
                cap-sd-highspeed;
                status = "disabled";
        };
                reg = <0 0xee120000 0 0x100>;
                interrupt-parent = <&gic>;
                interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
                cap-sd-highspeed;
                status = "disabled";
        };
                reg = <0 0xee140000 0 0x100>;
                interrupt-parent = <&gic>;
                interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
                cap-sd-highspeed;
                status = "disabled";
        };
                reg = <0 0xee160000 0 0x100>;
                interrupt-parent = <&gic>;
                interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
                cap-sd-highspeed;
                status = "disabled";
        };