video: dw_mipi_dsi: fix [hv]sync active vs back porch
authorJohn Keeping <john@metanate.com>
Wed, 7 Sep 2022 11:06:32 +0000 (12:06 +0100)
committerAnatolij Gustschin <agust@denx.de>
Sun, 30 Oct 2022 07:19:45 +0000 (08:19 +0100)
The wrong fields are pulled out of the timings here so the values
programmed into the DSI_VID_HSA_LINES/DSI_VID_HBP_LINES and
DSI_VID_VSA_LINES/DSI_VID_VBP_LINES registers are swapped.

Use the right fields so that the correct values are programmed.

Fixes: d4f7ea83fc ("video: add MIPI DSI host controller bridge")
Signed-off-by: John Keeping <john@metanate.com>
drivers/video/dw_mipi_dsi.c

index a5b38ac..6d9c5a9 100644 (file)
@@ -621,8 +621,8 @@ static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi,
        htotal = timings->hactive.typ + timings->hfront_porch.typ +
                 timings->hback_porch.typ + timings->hsync_len.typ;
 
-       hsa = timings->hback_porch.typ;
-       hbp = timings->hsync_len.typ;
+       hsa = timings->hsync_len.typ;
+       hbp = timings->hback_porch.typ;
 
        /*
         * TODO dw drv improvements
@@ -644,9 +644,9 @@ static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi,
        u32 vactive, vsa, vfp, vbp;
 
        vactive = timings->vactive.typ;
-       vsa =  timings->vback_porch.typ;
+       vsa =  timings->vsync_len.typ;
        vfp =  timings->vfront_porch.typ;
-       vbp = timings->vsync_len.typ;
+       vbp = timings->vback_porch.typ;
 
        dsi_write(dsi, DSI_VID_VACTIVE_LINES, vactive);
        dsi_write(dsi, DSI_VID_VSA_LINES, vsa);