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clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks
author
Icenowy Zheng
<icenowy@aosc.io>
Sun, 28 Jul 2019 03:12:23 +0000
(11:12 +0800)
committer
Maxime Ripard
<maxime.ripard@bootlin.com>
Mon, 12 Aug 2019 08:05:13 +0000
(10:05 +0200)
The MMC2 clock slices are currently not defined in V3s CCU driver, which
makes MMC2 not working.
Fix this issue.
Fixes:
d0f11d14b0bc
("clk: sunxi-ng: add support for V3s CCU")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
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diff --git
a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
index
4eb6824
..
f79170e
100644
(file)
--- a/
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
+++ b/
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c
@@
-513,6
+513,9
@@
static struct clk_hw_onecell_data sun8i_v3s_hw_clks = {
[CLK_MMC1] = &mmc1_clk.common.hw,
[CLK_MMC1_SAMPLE] = &mmc1_sample_clk.common.hw,
[CLK_MMC1_OUTPUT] = &mmc1_output_clk.common.hw,
+ [CLK_MMC2] = &mmc2_clk.common.hw,
+ [CLK_MMC2_SAMPLE] = &mmc2_sample_clk.common.hw,
+ [CLK_MMC2_OUTPUT] = &mmc2_output_clk.common.hw,
[CLK_CE] = &ce_clk.common.hw,
[CLK_SPI0] = &spi0_clk.common.hw,
[CLK_USB_PHY0] = &usb_phy0_clk.common.hw,