arm64: dts: qcom: sc7180: Add dynamic CPU power coefficients
authorRajendra Nayak <rnayak@codeaurora.org>
Tue, 7 Jan 2020 10:45:24 +0000 (16:15 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 26 Feb 2020 04:52:55 +0000 (20:52 -0800)
Add dynamic power coefficients for Silver and Gold CPUs on
SC7180 SoC.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1578393926-5052-1-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sc7180.dtsi

index 2f1b3a1..8ebfa2e 100644 (file)
@@ -89,6 +89,7 @@
                        compatible = "arm,armv8";
                        reg = <0x0 0x0>;
                        enable-method = "psci";
+                       dynamic-power-coefficient = <100>;
                        next-level-cache = <&L2_0>;
                        #cooling-cells = <2>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        compatible = "arm,armv8";
                        reg = <0x0 0x100>;
                        enable-method = "psci";
+                       dynamic-power-coefficient = <100>;
                        next-level-cache = <&L2_100>;
                        #cooling-cells = <2>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        compatible = "arm,armv8";
                        reg = <0x0 0x200>;
                        enable-method = "psci";
+                       dynamic-power-coefficient = <100>;
                        next-level-cache = <&L2_200>;
                        #cooling-cells = <2>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        compatible = "arm,armv8";
                        reg = <0x0 0x300>;
                        enable-method = "psci";
+                       dynamic-power-coefficient = <100>;
                        next-level-cache = <&L2_300>;
                        #cooling-cells = <2>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        compatible = "arm,armv8";
                        reg = <0x0 0x400>;
                        enable-method = "psci";
+                       dynamic-power-coefficient = <100>;
                        next-level-cache = <&L2_400>;
                        #cooling-cells = <2>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        compatible = "arm,armv8";
                        reg = <0x0 0x500>;
                        enable-method = "psci";
+                       dynamic-power-coefficient = <100>;
                        next-level-cache = <&L2_500>;
                        #cooling-cells = <2>;
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        compatible = "arm,armv8";
                        reg = <0x0 0x600>;
                        enable-method = "psci";
+                       dynamic-power-coefficient = <405>;
                        next-level-cache = <&L2_600>;
                        #cooling-cells = <2>;
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        compatible = "arm,armv8";
                        reg = <0x0 0x700>;
                        enable-method = "psci";
+                       dynamic-power-coefficient = <405>;
                        next-level-cache = <&L2_700>;
                        #cooling-cells = <2>;
                        qcom,freq-domain = <&cpufreq_hw 1>;