def atomic_store_unordered_monotonic_64
: unordered_monotonic_store<atomic_store_64>;
-defm : StPat<atomic_store_8, ST_B, GPR, GRLenVT>;
-defm : StPat<atomic_store_16, ST_H, GPR, GRLenVT>;
-defm : StPat<atomic_store_unordered_monotonic_32, ST_W, GPR, i32>,
- Requires<[IsLA32]>;
+/// AtomicStores
+
+multiclass AtomicStPat<PatFrag StoreOp, LAInst Inst, RegisterClass StTy,
+ ValueType vt> {
+ def : Pat<(StoreOp BaseAddr:$ptr, (vt StTy:$val)),
+ (Inst StTy:$val, BaseAddr:$ptr, 0)>;
+ def : Pat<(StoreOp (AddLike BaseAddr:$ptr, simm12:$imm12), (vt StTy:$val)),
+ (Inst StTy:$val, BaseAddr:$ptr, simm12:$imm12)>;
+}
+
+defm : AtomicStPat<atomic_store_8, ST_B, GPR, GRLenVT>;
+defm : AtomicStPat<atomic_store_16, ST_H, GPR, GRLenVT>;
+defm : AtomicStPat<atomic_store_unordered_monotonic_32, ST_W, GPR, i32>,
+ Requires<[IsLA32]>;
def PseudoAtomicStoreW : Pseudo<(outs GPR:$dst), (ins GPR:$rj, GPR:$rk)>,
PseudoInstExpansion<(AMSWAP_DB_W R0,
(PseudoAtomicStoreD GPR:$rj, GPR:$rk)>;
defm : LdPat<atomic_load_64, LD_D>;
-defm : StPat<atomic_store_unordered_monotonic_32, ST_W, GPR, i64>;
-defm : StPat<atomic_store_unordered_monotonic_64, ST_D, GPR, i64>;
+defm : AtomicStPat<atomic_store_unordered_monotonic_32, ST_W, GPR, i64>;
+defm : AtomicStPat<atomic_store_unordered_monotonic_64, ST_D, GPR, i64>;
} // Predicates = [IsLA64]
/// Atomic Ops
; LA32-LABEL: store_release_i8:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
-; LA32-NEXT: st.b $a0, $a1, 0
+; LA32-NEXT: st.b $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_release_i8:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
-; LA64-NEXT: st.b $a0, $a1, 0
+; LA64-NEXT: st.b $a1, $a0, 0
; LA64-NEXT: ret
store atomic i8 %v, ptr %ptr release, align 1
ret void
; LA32-LABEL: store_release_i16:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
-; LA32-NEXT: st.h $a0, $a1, 0
+; LA32-NEXT: st.h $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_release_i16:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
-; LA64-NEXT: st.h $a0, $a1, 0
+; LA64-NEXT: st.h $a1, $a0, 0
; LA64-NEXT: ret
store atomic i16 %v, ptr %ptr release, align 2
ret void
; LA32-LABEL: store_release_i32:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
-; LA32-NEXT: st.w $a0, $a1, 0
+; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_release_i32:
define void @store_unordered_i8(ptr %ptr, i8 signext %v) {
; LA32-LABEL: store_unordered_i8:
; LA32: # %bb.0:
-; LA32-NEXT: st.b $a0, $a1, 0
+; LA32-NEXT: st.b $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_unordered_i8:
; LA64: # %bb.0:
-; LA64-NEXT: st.b $a0, $a1, 0
+; LA64-NEXT: st.b $a1, $a0, 0
; LA64-NEXT: ret
store atomic i8 %v, ptr %ptr unordered, align 1
ret void
define void @store_unordered_i16(ptr %ptr, i16 signext %v) {
; LA32-LABEL: store_unordered_i16:
; LA32: # %bb.0:
-; LA32-NEXT: st.h $a0, $a1, 0
+; LA32-NEXT: st.h $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_unordered_i16:
; LA64: # %bb.0:
-; LA64-NEXT: st.h $a0, $a1, 0
+; LA64-NEXT: st.h $a1, $a0, 0
; LA64-NEXT: ret
store atomic i16 %v, ptr %ptr unordered, align 2
ret void
define void @store_unordered_i32(ptr %ptr, i32 signext %v) {
; LA32-LABEL: store_unordered_i32:
; LA32: # %bb.0:
-; LA32-NEXT: st.w $a0, $a1, 0
+; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_unordered_i32:
; LA64: # %bb.0:
-; LA64-NEXT: st.w $a0, $a1, 0
+; LA64-NEXT: st.w $a1, $a0, 0
; LA64-NEXT: ret
store atomic i32 %v, ptr %ptr unordered, align 4
ret void
;
; LA64-LABEL: store_unordered_i64:
; LA64: # %bb.0:
-; LA64-NEXT: st.d $a0, $a1, 0
+; LA64-NEXT: st.d $a1, $a0, 0
; LA64-NEXT: ret
store atomic i64 %v, ptr %ptr unordered, align 8
ret void
define void @store_monotonic_i8(ptr %ptr, i8 signext %v) {
; LA32-LABEL: store_monotonic_i8:
; LA32: # %bb.0:
-; LA32-NEXT: st.b $a0, $a1, 0
+; LA32-NEXT: st.b $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_monotonic_i8:
; LA64: # %bb.0:
-; LA64-NEXT: st.b $a0, $a1, 0
+; LA64-NEXT: st.b $a1, $a0, 0
; LA64-NEXT: ret
store atomic i8 %v, ptr %ptr monotonic, align 1
ret void
define void @store_monotonic_i16(ptr %ptr, i16 signext %v) {
; LA32-LABEL: store_monotonic_i16:
; LA32: # %bb.0:
-; LA32-NEXT: st.h $a0, $a1, 0
+; LA32-NEXT: st.h $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_monotonic_i16:
; LA64: # %bb.0:
-; LA64-NEXT: st.h $a0, $a1, 0
+; LA64-NEXT: st.h $a1, $a0, 0
; LA64-NEXT: ret
store atomic i16 %v, ptr %ptr monotonic, align 2
ret void
define void @store_monotonic_i32(ptr %ptr, i32 signext %v) {
; LA32-LABEL: store_monotonic_i32:
; LA32: # %bb.0:
-; LA32-NEXT: st.w $a0, $a1, 0
+; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_monotonic_i32:
; LA64: # %bb.0:
-; LA64-NEXT: st.w $a0, $a1, 0
+; LA64-NEXT: st.w $a1, $a0, 0
; LA64-NEXT: ret
store atomic i32 %v, ptr %ptr monotonic, align 4
ret void
;
; LA64-LABEL: store_monotonic_i64:
; LA64: # %bb.0:
-; LA64-NEXT: st.d $a0, $a1, 0
+; LA64-NEXT: st.d $a1, $a0, 0
; LA64-NEXT: ret
store atomic i64 %v, ptr %ptr monotonic, align 8
ret void
; LA32-LABEL: store_seq_cst_i8:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
-; LA32-NEXT: st.b $a0, $a1, 0
+; LA32-NEXT: st.b $a1, $a0, 0
; LA32-NEXT: dbar 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_seq_cst_i8:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
-; LA64-NEXT: st.b $a0, $a1, 0
+; LA64-NEXT: st.b $a1, $a0, 0
; LA64-NEXT: dbar 0
; LA64-NEXT: ret
store atomic i8 %v, ptr %ptr seq_cst, align 1
; LA32-LABEL: store_seq_cst_i16:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
-; LA32-NEXT: st.h $a0, $a1, 0
+; LA32-NEXT: st.h $a1, $a0, 0
; LA32-NEXT: dbar 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_seq_cst_i16:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
-; LA64-NEXT: st.h $a0, $a1, 0
+; LA64-NEXT: st.h $a1, $a0, 0
; LA64-NEXT: dbar 0
; LA64-NEXT: ret
store atomic i16 %v, ptr %ptr seq_cst, align 2
; LA32-LABEL: store_seq_cst_i32:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
-; LA32-NEXT: st.w $a0, $a1, 0
+; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: dbar 0
; LA32-NEXT: ret
;