ARM: kernel: update topology to use new MPIDR macros
authorLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Fri, 16 Nov 2012 15:24:06 +0000 (15:24 +0000)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Mon, 19 Nov 2012 15:44:33 +0000 (15:44 +0000)
This patch updates the topology initialization code to use the newly
defined accessors to retrieve the MPIDR affinity levels.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
arch/arm/kernel/topology.c

index cd68d1a..79282eb 100644 (file)
@@ -257,19 +257,14 @@ void store_cpu_topology(unsigned int cpuid)
 
                if (mpidr & MPIDR_MT_BITMASK) {
                        /* core performance interdependency */
-                       cpuid_topo->thread_id = (mpidr >> MPIDR_LEVEL0_SHIFT)
-                               & MPIDR_LEVEL0_MASK;
-                       cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL1_SHIFT)
-                               & MPIDR_LEVEL1_MASK;
-                       cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL2_SHIFT)
-                               & MPIDR_LEVEL2_MASK;
+                       cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
+                       cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
+                       cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 2);
                } else {
                        /* largely independent cores */
                        cpuid_topo->thread_id = -1;
-                       cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL0_SHIFT)
-                               & MPIDR_LEVEL0_MASK;
-                       cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL1_SHIFT)
-                               & MPIDR_LEVEL1_MASK;
+                       cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
+                       cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 1);
                }
        } else {
                /*