projects / platform / upstream / dldt.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: f4ed257)
Align time_tests models with master (#3270)
authorVitaliy Urusovskij <vitaliy.urusovskij@intel.com>
Tue, 24 Nov 2020 08:06:37 +0000 (11:06 +0300)
committerGitHub <noreply@github.com>
Tue, 24 Nov 2020 08:06:37 +0000 (11:06 +0300)
* Add new model to `tgl_test_config.yml` (#3236)

* Fix wrong path for `yolo-v2-tiny-ava-0001` for time_tests

* Add several new models to `tgl_test_config.yml` in time_tests

tests/time_tests/test_runner/.automation/tgl_test_config.yml patch | blob | history

diff --git a/tests/time_tests/test_runner/.automation/tgl_test_config.yml b/tests/time_tests/test_runner/.automation/tgl_test_config.yml
index 4c97c80..8b1a35f 100644 (file)
--- a/tests/time_tests/test_runner/.automation/tgl_test_config.yml
+++ b/tests/time_tests/test_runner/.automation/tgl_test_config.yml
@@ -53,4 +53,424 @@
     path: ${VPUX_MODELS_PKG}/mobilenet-v2/caffe2/FP16-INT8/mobilenet-v2.xml
     name: mobilenet-v2
     precision: FP16-INT8
-    framework: caffe2
\ No newline at end of file
+    framework: caffe2
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/faster_rcnn_resnet101_coco/tf/FP16/faster_rcnn_resnet101_coco.xml
+    name: faster_rcnn_resnet101_coco
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/faster_rcnn_resnet101_coco/tf/FP16/faster_rcnn_resnet101_coco.xml
+    name: faster_rcnn_resnet101_coco
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/faster_rcnn_resnet101_coco/tf/FP16-INT8/faster_rcnn_resnet101_coco.xml
+    name: faster_rcnn_resnet101_coco
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/faster_rcnn_resnet101_coco/tf/FP16-INT8/faster_rcnn_resnet101_coco.xml
+    name: faster_rcnn_resnet101_coco
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/faster-rcnn-resnet101-coco-sparse-60-0001/tf/FP16/faster-rcnn-resnet101-coco-sparse-60-0001.xml
+    name: faster-rcnn-resnet101-coco-sparse-60-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/faster-rcnn-resnet101-coco-sparse-60-0001/tf/FP16/faster-rcnn-resnet101-coco-sparse-60-0001.xml
+    name: faster-rcnn-resnet101-coco-sparse-60-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/faster-rcnn-resnet101-coco-sparse-60-0001/tf/FP16-INT8/faster-rcnn-resnet101-coco-sparse-60-0001.xml
+    name: faster-rcnn-resnet101-coco-sparse-60-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/faster-rcnn-resnet101-coco-sparse-60-0001/tf/FP16-INT8/faster-rcnn-resnet101-coco-sparse-60-0001.xml
+    name: faster-rcnn-resnet101-coco-sparse-60-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/googlenet-v1/tf/FP16/googlenet-v1.xml
+    name: googlenet-v1
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/googlenet-v1/tf/FP16/googlenet-v1.xml
+    name: googlenet-v1
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/googlenet-v1/tf/FP16-INT8/googlenet-v1.xml
+    name: googlenet-v1
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/googlenet-v1/tf/FP16-INT8/googlenet-v1.xml
+    name: googlenet-v1
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/googlenet-v3/tf/FP16/googlenet-v3.xml
+    name: googlenet-v3
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/googlenet-v3/tf/FP16/googlenet-v3.xml
+    name: googlenet-v3
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/googlenet-v3/tf/FP16-INT8/googlenet-v3.xml
+    name: googlenet-v3
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/googlenet-v3/tf/FP16-INT8/googlenet-v3.xml
+    name: googlenet-v3
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/ssd512/caffe/FP16/ssd512.xml
+    name: ssd512
+    precision: FP16
+    framework: caffe
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/ssd512/caffe/FP16/ssd512.xml
+    name: ssd512
+    precision: FP16
+    framework: caffe
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/ssd512/caffe/FP16-INT8/ssd512.xml
+    name: ssd512
+    precision: FP16-INT8
+    framework: caffe
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/ssd512/caffe/FP16-INT8/ssd512.xml
+    name: ssd512
+    precision: FP16-INT8
+    framework: caffe
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-0001/tf/FP16/yolo-v2-ava-0001.xml
+    name: yolo-v2-ava-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-0001/tf/FP16/yolo-v2-ava-0001.xml
+    name: yolo-v2-ava-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-0001/tf/FP16-INT8/yolo-v2-ava-0001.xml
+    name: yolo-v2-ava-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-0001/tf/FP16-INT8/yolo-v2-ava-0001.xml
+    name: yolo-v2-ava-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-sparse-35-0001/tf/FP16/yolo-v2-ava-sparse-35-0001.xml
+    name: yolo-v2-ava-sparse-35-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-sparse-35-0001/tf/FP16/yolo-v2-ava-sparse-35-0001.xml
+    name: yolo-v2-ava-sparse-35-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-sparse-35-0001/tf/FP16-INT8/yolo-v2-ava-sparse-35-0001.xml
+    name: yolo-v2-ava-sparse-35-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-sparse-35-0001/tf/FP16-INT8/yolo-v2-ava-sparse-35-0001.xml
+    name: yolo-v2-ava-sparse-35-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-sparse-70-0001/tf/FP16/yolo-v2-ava-sparse-70-0001.xml
+    name: yolo-v2-ava-sparse-70-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-sparse-70-0001/tf/FP16/yolo-v2-ava-sparse-70-0001.xml
+    name: yolo-v2-ava-sparse-70-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-sparse-70-0001/tf/FP16-INT8/yolo-v2-ava-sparse-70-0001.xml
+    name: yolo-v2-ava-sparse-70-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-ava-sparse-70-0001/tf/FP16-INT8/yolo-v2-ava-sparse-70-0001.xml
+    name: yolo-v2-ava-sparse-70-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-0001/tf/FP16/yolo-v2-tiny-ava-0001.xml
+    name: yolo-v2-tiny-ava-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-0001/tf/FP16/yolo-v2-tiny-ava-0001.xml
+    name: yolo-v2-tiny-ava-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-0001/tf/FP16-INT8/yolo-v2-tiny-ava-0001.xml
+    name: yolo-v2-tiny-ava-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-0001/tf/FP16-INT8/yolo-v2-tiny-ava-0001.xml
+    name: yolo-v2-tiny-ava-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-sparse-30-0001/tf/FP16/yolo-v2-tiny-ava-sparse-30-0001.xml
+    name: yolo-v2-tiny-ava-sparse-30-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-sparse-30-0001/tf/FP16/yolo-v2-tiny-ava-sparse-30-0001.xml
+    name: yolo-v2-tiny-ava-sparse-30-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-sparse-30-0001/tf/FP16-INT8/yolo-v2-tiny-ava-sparse-30-0001.xml
+    name: yolo-v2-tiny-ava-sparse-30-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-sparse-30-0001/tf/FP16-INT8/yolo-v2-tiny-ava-sparse-30-0001.xml
+    name: yolo-v2-tiny-ava-sparse-30-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-sparse-60-0001/tf/FP16/yolo-v2-tiny-ava-sparse-60-0001.xml
+    name: yolo-v2-tiny-ava-sparse-60-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-sparse-60-0001/tf/FP16/yolo-v2-tiny-ava-sparse-60-0001.xml
+    name: yolo-v2-tiny-ava-sparse-60-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-sparse-60-0001/tf/FP16-INT8/yolo-v2-tiny-ava-sparse-60-0001.xml
+    name: yolo-v2-tiny-ava-sparse-60-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/yolo-v2-tiny-ava-sparse-60-0001/tf/FP16-INT8/yolo-v2-tiny-ava-sparse-60-0001.xml
+    name: yolo-v2-tiny-ava-sparse-60-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/squeezenet1.1/tf/FP16/squeezenet1.1.xml
+    name: squeezenet1.1
+    precision: FP16
+    framework: caffe2
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/squeezenet1.1/tf/FP16/squeezenet1.1.xml
+    name: squeezenet1.1
+    precision: FP16
+    framework: caffe2
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/squeezenet1.1/tf/FP16-INT8/squeezenet1.1.xml
+    name: squeezenet1.1
+    precision: FP16-INT8
+    framework: caffe2
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/squeezenet1.1/tf/FP16-INT8/squeezenet1.1.xml
+    name: squeezenet1.1
+    precision: FP16-INT8
+    framework: caffe2
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-0001/tf/FP16/icnet-camvid-ava-0001.xml
+    name: icnet-camvid-ava-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-0001/tf/FP16/icnet-camvid-ava-0001.xml
+    name: icnet-camvid-ava-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-0001/tf/FP16-INT8/icnet-camvid-ava-0001.xml
+    name: icnet-camvid-ava-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-0001/tf/FP16-INT8/icnet-camvid-ava-0001.xml
+    name: icnet-camvid-ava-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-sparse-30-0001/tf/FP16/icnet-camvid-ava-sparse-30-0001.xml
+    name: icnet-camvid-ava-sparse-30-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-sparse-30-0001/tf/FP16/icnet-camvid-ava-sparse-30-0001.xml
+    name: icnet-camvid-ava-sparse-30-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-sparse-30-0001/tf/FP16-INT8/icnet-camvid-ava-sparse-30-0001.xml
+    name: icnet-camvid-ava-sparse-30-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-sparse-30-0001/tf/FP16-INT8/icnet-camvid-ava-sparse-30-0001.xml
+    name: icnet-camvid-ava-sparse-30-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-sparse-60-0001/tf/FP16/icnet-camvid-ava-sparse-60-0001.xml
+    name: icnet-camvid-ava-sparse-60-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-sparse-60-0001/tf/FP16/icnet-camvid-ava-sparse-60-0001.xml
+    name: icnet-camvid-ava-sparse-60-0001
+    precision: FP16
+    framework: tf
+- device:
+    name: CPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-sparse-60-0001/tf/FP16-INT8/icnet-camvid-ava-sparse-60-0001.xml
+    name: icnet-camvid-ava-sparse-60-0001
+    precision: FP16-INT8
+    framework: tf
+- device:
+    name: GPU
+  model:
+    path: ${VPUX_MODELS_PKG}/icnet-camvid-ava-sparse-60-0001/tf/FP16-INT8/icnet-camvid-ava-sparse-60-0001.xml
+    name: icnet-camvid-ava-sparse-60-0001
+    precision: FP16-INT8
+    framework: tf
Domain: Machine Learning / ML Framework;