R600/SI: Fix assertion on infinite loops.
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 11 Feb 2014 21:12:38 +0000 (21:12 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 11 Feb 2014 21:12:38 +0000 (21:12 +0000)
This isn't the most useful case to fix in the real world,
but bugpoint runs into this.

llvm-svn: 201177

llvm/lib/Target/R600/SILowerControlFlow.cpp
llvm/test/CodeGen/R600/infinite-loop.ll [new file with mode: 0644]

index 4b0952f..f6f9016 100644 (file)
@@ -283,8 +283,10 @@ void SILowerControlFlowPass::EndCf(MachineInstr &MI) {
 }
 
 void SILowerControlFlowPass::Branch(MachineInstr &MI) {
-  assert(MI.getOperand(0).getMBB() == MI.getParent()->getNextNode());
-  MI.eraseFromParent();
+  if (MI.getOperand(0).getMBB() == MI.getParent()->getNextNode())
+    MI.eraseFromParent();
+
+  // If these aren't equal, this is probably an infinite loop.
 }
 
 void SILowerControlFlowPass::Kill(MachineInstr &MI) {
diff --git a/llvm/test/CodeGen/R600/infinite-loop.ll b/llvm/test/CodeGen/R600/infinite-loop.ll
new file mode 100644 (file)
index 0000000..a60bc37
--- /dev/null
@@ -0,0 +1,17 @@
+; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+
+; SI-LABEL: @infinite_loop:
+; SI: V_MOV_B32_e32 [[REG:v[0-9]+]], 999
+; SI: BB0_1:
+; SI: BUFFER_STORE_DWORD [[REG]]
+; SI: S_WAITCNT vmcnt(0) expcnt(0)
+; SI: S_BRANCH BB0_1
+define void @infinite_loop(i32 addrspace(1)* %out) {
+entry:
+  br label %for.body
+
+for.body:                                         ; preds = %entry, %for.body
+  store i32 999, i32 addrspace(1)* %out, align 4
+  br label %for.body
+}
+