[PATCH] nouveau: reset AGP on init for < nv40

This is necessary for AGP to work after running bios init scripts on nv3x, and
is seen in mmio traces of all cards (nv04-nv4x)

I'm not making the equivalent change to nv40_mc.c, as early cards (6200, 6800gt)
use the 0x000018XX PBUS and later cards use the 0x000880XX PBUS and I don't know
the effects of using the wrong one

diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h
index 7ac02f4..a250614 100644 (file)
--- a/shared-core/nouveau_reg.h
+++ b/shared-core/nouveau_reg.h
@@ -112,6 +112,9 @@
 #define NV50_PUNK_BAR3_CTXDMA_VALID                           (1<<31)
 #define NV50_PUNK_UNK1710                                  0x00001710
 
+#define NV04_PBUS_PCI_NV_1                                 0x00001804
+#define NV04_PBUS_PCI_NV_19                                0x0000184C
+
 #define NV04_PTIMER_INTR_0                                 0x00009100
 #define NV04_PTIMER_INTR_EN_0                              0x00009140
 #define NV04_PTIMER_NUMERATOR                              0x00009200

diff --git a/shared-core/nv04_mc.c b/shared-core/nv04_mc.c
index 24c1f7b..a6a2045 100644 (file)
--- a/shared-core/nv04_mc.c
+++ b/shared-core/nv04_mc.c
@@ -7,12 +7,25 @@ int
 nv04_mc_init(struct drm_device *dev)
 {
        struct drm_nouveau_private *dev_priv = dev->dev_private;
+       uint32_t saved_pci_nv_1, saved_pci_nv_19;
+
+       saved_pci_nv_1 = NV_READ(NV04_PBUS_PCI_NV_1);
+       saved_pci_nv_19 = NV_READ(NV04_PBUS_PCI_NV_19);
+
+       /* clear busmaster bit */
+       NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1 & ~(0x00000001 << 2));
+       /* clear SBA, AGP and FW bits */
+       NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19 & 0xfffff00f);
 
        /* Power up everything, resetting each individual unit will
         * be done later if needed.
         */
        NV_WRITE(NV03_PMC_ENABLE, 0xFFFFFFFF);
 
+       /* and restore (gives effect of resetting AGP) */
+       NV_WRITE(NV04_PBUS_PCI_NV_19, saved_pci_nv_19);
+       NV_WRITE(NV04_PBUS_PCI_NV_1, saved_pci_nv_1);
+
        return 0;
 }