dt-bindings: PCI: designware: Add support for EP in DesignWare driver

Add device tree binding documentation for the EP in PCIe DesignWare driver.

Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>

diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index 7f9804d..c124f9b 100644 (file)
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -3,6 +3,7 @@
 Required properties:
 - compatible:
        "snps,dw-pcie" for RC mode;
+       "snps,dw-pcie-ep" for EP mode;
 - reg: Should contain the configuration address space.
 - reg-names: Must be "config" for the PCIe configuration space.
     (The old way of getting the configuration address space from "ranges"
@@ -56,3 +57,14 @@ Example configuration:
                #interrupt-cells = <1>;
                num-lanes = <1>;
        };
+or
+       pcie: pcie@dfc00000 {
+               compatible = "snps,dw-pcie-ep";
+               reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
+                     <0xdfc01000 0x0001000>, /* IP registers 2 */
+                     <0xd0000000 0x2000000>; /* Configuration space */
+               reg-names = "dbi", "dbi2", "addr_space";
+               num-ib-windows = <6>;
+               num-ob-windows = <2>;
+               num-lanes = <1>;
+       };