intel: Introducing Amber Lake platform

Amber Lake uses the same gen graphics as Kaby Lake, including a id
that were previously marked as reserved on Kaby Lake, but that now is
moved to AML page.

So, let's just move it to AML macro that will feed into KBL macro
just to keep it better organized to make easier future code review
but it will be handled as a KBL.

This is a copy of merged i915's
commit e364672477a1 ("drm/i915/aml: Introducing Amber Lake platform")

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 44e65f9..583d644 100644 (file)
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -201,7 +201,6 @@
 #define PCI_CHIP_KABYLAKE_ULX_GT1_5    0x5915
 #define PCI_CHIP_KABYLAKE_ULX_GT1      0x590E
 #define PCI_CHIP_KABYLAKE_ULX_GT2_0    0x591E
-#define PCI_CHIP_KABYLAKE_ULX_GT2_1    0x591C
 #define PCI_CHIP_KABYLAKE_DT_GT2       0x5912
 #define PCI_CHIP_KABYLAKE_M_GT2                0x5917
 #define PCI_CHIP_KABYLAKE_DT_GT1       0x5902
@@ -213,6 +212,9 @@
 #define PCI_CHIP_KABYLAKE_SRV_GT1      0x590A
 #define PCI_CHIP_KABYLAKE_WKS_GT2      0x591D
 
+#define PCI_CHIP_AMBERLAKE_ULX_GT2_1   0x591C
+#define PCI_CHIP_AMBERLAKE_ULX_GT2_2   0x87C0
+
 #define PCI_CHIP_BROXTON_0             0x0A84
 #define PCI_CHIP_BROXTON_1             0x1A84
 #define PCI_CHIP_BROXTON_2             0x5A84
@@ -468,12 +470,13 @@
 #define IS_KBL_GT2(devid)      ((devid) == PCI_CHIP_KABYLAKE_ULT_GT2   || \
                                 (devid) == PCI_CHIP_KABYLAKE_ULT_GT2F  || \
                                 (devid) == PCI_CHIP_KABYLAKE_ULX_GT2_0 || \
-                                (devid) == PCI_CHIP_KABYLAKE_ULX_GT2_1 || \
                                 (devid) == PCI_CHIP_KABYLAKE_DT_GT2    || \
                                 (devid) == PCI_CHIP_KABYLAKE_M_GT2     || \
                                 (devid) == PCI_CHIP_KABYLAKE_HALO_GT2  || \
                                 (devid) == PCI_CHIP_KABYLAKE_SRV_GT2   || \
-                                (devid) == PCI_CHIP_KABYLAKE_WKS_GT2)
+                                (devid) == PCI_CHIP_KABYLAKE_WKS_GT2 || \
+                                (devid) == PCI_CHIP_AMBERLAKE_ULX_GT2_1        || \
+                                (devid) == PCI_CHIP_AMBERLAKE_ULX_GT2_2)
 
 #define IS_KBL_GT3(devid)      ((devid) == PCI_CHIP_KABYLAKE_ULT_GT3_0 || \
                                 (devid) == PCI_CHIP_KABYLAKE_ULT_GT3_1 || \