The i915simple driver now runs well enough to lock up hardware.
authorKeith Whitwell <keith@tungstengraphics.com>
Wed, 8 Aug 2007 11:28:21 +0000 (12:28 +0100)
committerKeith Whitwell <keith@tungstengraphics.com>
Wed, 8 Aug 2007 11:30:27 +0000 (12:30 +0100)
src/mesa/drivers/dri/intel_winsys/intel_pipe_i915simple.c
src/mesa/pipe/i915simple/i915_context.c
src/mesa/pipe/i915simple/i915_prim_emit.c
src/mesa/pipe/i915simple/i915_state_derived.c
src/mesa/pipe/i915simple/i915_state_emit.c

index b456550..244e32c 100644 (file)
@@ -168,7 +168,7 @@ static unsigned *intel_i915_batch_start( struct i915_winsys *sws,
 
    /* XXX: check relocs. 
     */
-   if (intel_batchbuffer_space( intel->batch ) < dwords * 4) {
+   if (intel_batchbuffer_space( intel->batch ) >= dwords * 4) {
       /* XXX: Hmm, the driver can't really do much with this pointer: 
        */
       //return intel->batch->ptr;      
@@ -191,8 +191,18 @@ static void intel_i915_batch_reloc( struct i915_winsys *sws,
                             unsigned delta )
 {
    struct intel_context *intel = intel_i915_winsys(sws)->intel;
-   unsigned flags = 0;
-   unsigned mask = 0;
+   unsigned flags = DRM_BO_FLAG_MEM_TT;
+   unsigned mask = DRM_BO_MASK_MEM;
+
+   if (access_flags & I915_BUFFER_ACCESS_WRITE) {
+      flags |= DRM_BO_FLAG_WRITE;
+      mask |= DRM_BO_FLAG_WRITE;
+   }
+
+   if (access_flags & I915_BUFFER_ACCESS_READ) {
+      flags |= DRM_BO_FLAG_READ;
+      mask |= DRM_BO_FLAG_READ;
+   }
 
    intel_batchbuffer_emit_reloc( intel->batch, 
                                 dri_bo( buf ),
index 87fccee..f39c282 100644 (file)
@@ -119,8 +119,8 @@ static void i915_draw_vb( struct pipe_context *pipe,
 {
    struct i915_context *i915 = i915_context( pipe );
 
-//   if (i915->dirty)
-//      i915_update_derived( i915 );
+   if (i915->dirty)
+      i915_update_derived( i915 );
 
    draw_vb( i915->draw, VB );
 }
index 97e3374..6d7cfe2 100644 (file)
@@ -35,6 +35,7 @@
 #include "i915_winsys.h"
 #include "i915_reg.h"
 #include "i915_state.h"
+#include "i915_batch.h"
 
 
 
@@ -91,17 +92,17 @@ static inline unsigned char float_to_ubyte( float f )
 /* Hardcoded vertex format: xyz/rgba
  */
 static inline void
-emit_hw_vertex( unsigned *ptr,
+emit_hw_vertex( struct i915_context *i915,
                struct vertex_header *vertex )
 {
-   ptr[0] = fui( vertex->data[0][0] );
-   ptr[1] = fui( vertex->data[0][1] );
-   ptr[2] = fui( vertex->data[0][2] );
-
-   ptr[3] = pack_ub4( float_to_ubyte( vertex->data[1][0] ),
-                     float_to_ubyte( vertex->data[1][1] ),
-                     float_to_ubyte( vertex->data[1][2] ),
-                     float_to_ubyte( vertex->data[1][3] ) );
+   OUT_BATCH( fui(vertex->data[0][0]) );
+   OUT_BATCH( fui(vertex->data[0][1]) );
+   OUT_BATCH( fui(vertex->data[0][2]) );
+
+   OUT_BATCH( pack_ub4(float_to_ubyte( vertex->data[1][0] ),
+                      float_to_ubyte( vertex->data[1][1] ),
+                      float_to_ubyte( vertex->data[1][2] ),
+                      float_to_ubyte( vertex->data[1][3] )) );
 }
                
                
@@ -134,12 +135,12 @@ emit_prim( struct draw_stage *stage,
    /* Emit each triangle as a single primitive.  I told you this was
     * simple.
     */
-   *ptr++ = (_3DPRIMITIVE | 
+   OUT_BATCH(_3DPRIMITIVE | 
             hwprim |
             ((4 + vertex_size * nr)/4 - 2));
 
    for (i = 0; i < nr; i++) {
-      emit_hw_vertex(ptr, prim->v[i]);
+      emit_hw_vertex(i915, prim->v[i]);
       ptr += vertex_size / sizeof(int);
    }
 }
index 392ac09..6e91e44 100644 (file)
@@ -76,7 +76,7 @@ static const GLuint frag_to_vf[FRAG_ATTRIB_MAX] =
 static void calculate_vertex_layout( struct i915_context *i915 )
 {
 //   const GLbitfield inputsRead = i915->fs.inputs_read;
-   const GLbitfield inputsRead = (FRAG_ATTRIB_WPOS | FRAG_ATTRIB_COL0);
+   const GLbitfield inputsRead = (FRAG_BIT_WPOS | FRAG_BIT_COL0);
    GLuint slot_to_vf_attr[VF_ATTRIB_MAX];
    GLbitfield attr_mask = 0x0;
    GLuint nr_attrs = 0;
index c0539da..4aa7e28 100644 (file)
@@ -42,7 +42,7 @@
 static unsigned translate_format( unsigned format )
 {
    switch (format) {
-   case PIPE_FORMAT_U_R8_G8_B8_A8:
+   case PIPE_FORMAT_U_A8_R8_G8_B8:
       return COLOR_BUF_ARGB8888;
    case PIPE_FORMAT_U_R5_G6_B5:
       return COLOR_BUF_RGB565;
@@ -212,8 +212,11 @@ i915_emit_hardware_state(struct i915_context *i915 )
 
    
    {
-      unsigned cformat = i915->framebuffer.cbufs[0]->format;
-      unsigned zformat = i915->framebuffer.zbuf->format;
+      unsigned cformat = translate_format( i915->framebuffer.cbufs[0]->format );
+      unsigned zformat = 0;
+      
+      if (i915->framebuffer.zbuf) 
+        zformat = translate_depth_format( i915->framebuffer.zbuf->format );
 
       OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
 
@@ -221,8 +224,8 @@ i915_emit_hardware_state(struct i915_context *i915 )
                DSTORG_VERT_BIAS(0x8) | /* .5 */
                LOD_PRECLAMP_OGL |
                TEX_DEFAULT_COLOR_OGL |
-               translate_format( cformat ) |
-               translate_depth_format( zformat ));
+               cformat |
+               zformat );
    }
 
    {