[S5PC100] Set DRAM I/O Drive-strength

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/board/samsung/tt/lowlevel_init.S b/board/samsung/tt/lowlevel_init.S
index 6be8ff3..d68b7da 100644 (file)
--- a/board/samsung/tt/lowlevel_init.S
+++ b/board/samsung/tt/lowlevel_init.S
@@ -130,6 +130,17 @@ interrupt_pending_loop:
 #      cmp     r1, #0x8
 #      beq     wakeup_reset
 
+       /* DRAM I/O Drive-Strength */
+       ldr     r0, =ELFIN_GPIO_BASE
+       ldr     r1, =0x5555
+       str     r1, [r0, #MP_0DRV_OFFSET]
+       str     r1, [r0, #MP_1DRV_OFFSET]
+       str     r1, [r0, #MP_2DRV_OFFSET]
+       str     r1, [r0, #MP_3DRV_OFFSET]
+       str     r1, [r0, #MP_4DRV_OFFSET]
+       str     r1, [r0, #MP_5DRV_OFFSET]
+       str     r1, [r0, #MP_6DRV_OFFSET]
+       str     r1, [r0, #MP_7DRV_OFFSET]
 1:
        mov     lr, r12
        mov     pc, lr

diff --git a/include/s5pc100.h b/include/s5pc100.h
index 09ee480..d19488a 100644 (file)
--- a/include/s5pc100.h
+++ b/include/s5pc100.h
@@ -394,6 +394,22 @@
 #define GPL4PDNCON_OFFSET      PDNCON_OFFSET(0x1D)
 #define GPL4PDNPULL_OFFSET     PDNPULL_OFFSET(0x1D)
 
+#define MP_0PULL_OFFSET                0x3C8
+#define MP_0DRV_OFFSET         0x3CC
+#define MP_0DNPULL_OFFSET      0x3D4
+#define MP_1PULL_OFFSET                0x3E8
+#define MP_1DRV_OFFSET         0x3EC
+#define MP_1DNPULL_OFFSET      0x3F4
+#define MP_2PULL_OFFSET                0x408
+#define MP_2DRV_OFFSET         0x40C
+#define MP_2DNPULL_OFFSET      0x414
+#define MP_3DRV_OFFSET         0x42C
+#define MP_4DRV_OFFSET         0x44C
+#define MP_5DRV_OFFSET         0x46C
+#define MP_6DRV_OFFSET         0x48C
+#define MP_7DRV_OFFSET         0x4AC
+#define MP_8DRV_OFFSET         0x4CC
+
 #define EINTPEND_OFFSET                0xA00
 
 /*