mx6: iomux: add GPR1 defines for use with nitrogen6x

Select GPIO1 as the USB OTG ID pin for Nitrogen6x

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

diff --git a/arch/arm/include/asm/arch-mx6/iomux.h b/arch/arm/include/asm/arch-mx6/iomux.h
index ff13a1e..fe4675e 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/iomux.h
+++ b/arch/arm/include/asm/arch-mx6/iomux.h
@@ -10,6 +10,12 @@
 #define MX6_IOMUXC_GPR7                0x020e001c
 
 /*
+ * IOMUXC_GPR1 bit fields
+ */
+#define IOMUXC_GPR1_OTG_ID_ENET_RX_ERR (0<<13)
+#define IOMUXC_GPR1_OTG_ID_GPIO1       (1<<13)
+#define IOMUXC_GPR1_OTG_ID_MASK                (1<<13)
+/*
  * IOMUXC_GPR13 bit fields
  */
 #define IOMUXC_GPR13_SDMA_STOP_REQ     (1<<30)

diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c
index 1712908..daa3fc8 100644 (file)
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -706,6 +706,13 @@ int overwrite_console(void)
 
 int board_init(void)
 {
+       struct iomuxc_base_regs *const iomuxc_regs
+               = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
+
+       clrsetbits_le32(&iomuxc_regs->gpr[1],
+                       IOMUXC_GPR1_OTG_ID_MASK,
+                       IOMUXC_GPR1_OTG_ID_GPIO1);
+
        /* address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;