drm/omap: HDMI5: clean up timings copy
authorTomi Valkeinen <tomi.valkeinen@ti.com>
Wed, 13 Jan 2016 16:41:38 +0000 (18:41 +0200)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Thu, 3 Mar 2016 15:36:43 +0000 (17:36 +0200)
The HDMI driver copies the timing values one by one. Instead we can just
copy the whole struct.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c

index ec9223e..947edb9 100644 (file)
@@ -292,25 +292,16 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
 {
        DSSDBG("hdmi_core_init\n");
 
+       video_cfg->v_fc_config.timings = cfg->timings;
+
        /* video core */
        video_cfg->data_enable_pol = 1; /* It is always 1*/
-       video_cfg->v_fc_config.timings.hsync_level = cfg->timings.hsync_level;
-       video_cfg->v_fc_config.timings.x_res = cfg->timings.x_res;
-       video_cfg->v_fc_config.timings.hsw = cfg->timings.hsw;
-       video_cfg->v_fc_config.timings.hbp = cfg->timings.hbp;
-       video_cfg->v_fc_config.timings.hfp = cfg->timings.hfp;
        video_cfg->hblank = cfg->timings.hfp +
                                cfg->timings.hbp + cfg->timings.hsw;
-       video_cfg->v_fc_config.timings.vsync_level = cfg->timings.vsync_level;
-       video_cfg->v_fc_config.timings.y_res = cfg->timings.y_res;
-       video_cfg->v_fc_config.timings.vsw = cfg->timings.vsw;
-       video_cfg->v_fc_config.timings.vfp = cfg->timings.vfp;
-       video_cfg->v_fc_config.timings.vbp = cfg->timings.vbp;
        video_cfg->vblank_osc = 0; /* Always 0 - need to confirm */
        video_cfg->vblank = cfg->timings.vsw +
                                cfg->timings.vfp + cfg->timings.vbp;
        video_cfg->v_fc_config.hdmi_dvi_mode = cfg->hdmi_dvi_mode;
-       video_cfg->v_fc_config.timings.interlace = cfg->timings.interlace;
 }
 
 /* DSS_HDMI_CORE_VIDEO_CONFIG */