ARM: OMAP2+: Configure voltage controller for retention
authorTony Lindgren <tony@atomide.com>
Fri, 18 Oct 2019 22:09:53 +0000 (15:09 -0700)
committerTony Lindgren <tony@atomide.com>
Fri, 18 Oct 2019 14:56:51 +0000 (07:56 -0700)
Similar to existing omap3_vc_set_pmic_signaling(), let's add omap4
specific omap4_vc_set_pmic_signaling(). This allows the configured
devices to enable voltage controller for retention later on during
init.

Cc: Merlijn Wajer <merlijn@wizzup.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/vc.c
arch/arm/mach-omap2/vc.h

index 3c94d1d..888b8ee 100644 (file)
 #define OMAP4430_AUTO_CTRL_VDD_CORE(x)         ((x) << 0)
 #define OMAP4430_AUTO_CTRL_VDD_RET             2
 
-#define OMAP4_VDD_DEFAULT_VAL  \
+#define OMAP4430_VDD_I2C_DISABLE_MASK  \
        (OMAP4430_VDD_IVA_I2C_DISABLE | \
-        OMAP4430_VDD_MPU_I2C_DISABLE |  \
-        OMAP4430_VDD_CORE_I2C_DISABLE | \
+        OMAP4430_VDD_MPU_I2C_DISABLE | \
+        OMAP4430_VDD_CORE_I2C_DISABLE)
+
+#define OMAP4_VDD_DEFAULT_VAL  \
+       (OMAP4430_VDD_I2C_DISABLE_MASK | \
         OMAP4430_VDD_IVA_PRESENCE | OMAP4430_VDD_MPU_PRESENCE | \
         OMAP4430_AUTO_CTRL_VDD_IVA(OMAP4430_AUTO_CTRL_VDD_RET) | \
         OMAP4430_AUTO_CTRL_VDD_MPU(OMAP4430_AUTO_CTRL_VDD_RET) | \
         OMAP4430_AUTO_CTRL_VDD_CORE(OMAP4430_AUTO_CTRL_VDD_RET))
 
+#define OMAP4_VDD_RET_VAL      \
+       (OMAP4_VDD_DEFAULT_VAL & ~OMAP4430_VDD_I2C_DISABLE_MASK)
+
 /**
  * struct omap_vc_channel_cfg - describe the cfg_channel bitfield
  * @sa: bit for slave address
@@ -299,6 +305,26 @@ void omap3_vc_set_pmic_signaling(int core_next_state)
        }
 }
 
+void omap4_vc_set_pmic_signaling(int core_next_state)
+{
+       struct voltagedomain *vd = vc.vd;
+       u32 val;
+
+       if (!vd)
+               return;
+
+       switch (core_next_state) {
+       case PWRDM_POWER_RET:
+               val = OMAP4_VDD_RET_VAL;
+               break;
+       default:
+               val = OMAP4_VDD_DEFAULT_VAL;
+               break;
+       }
+
+       vd->write(val, OMAP4_PRM_VOLTCTRL_OFFSET);
+}
+
 /*
  * Configure signal polarity for sys_clkreq and sys_off_mode pins
  * as the default values are wrong and can cause the system to hang
index 5bf0886..9e861db 100644 (file)
@@ -117,7 +117,7 @@ extern struct omap_vc_param omap4_iva_vc_data;
 extern struct omap_vc_param omap4_core_vc_data;
 
 void omap3_vc_set_pmic_signaling(int core_next_state);
-
+void omap4_vc_set_pmic_signaling(int core_next_state);
 
 void omap_vc_init_channel(struct voltagedomain *voltdm);
 int omap_vc_pre_scale(struct voltagedomain *voltdm,