bool HasInstructions;
private:
- /// LayoutOrder - The layout order of this fragment.
+ /// The layout order of this fragment.
unsigned LayoutOrder;
/// The data for the section this fragment is in.
MCSection *Parent;
- /// Atom - The atom this fragment is in, as represented by its defining
- /// symbol.
+ /// The atom this fragment is in, as represented by its defining symbol.
const MCSymbol *Atom;
/// \name Assembler Backend Data
//
// FIXME: This could all be kept private to the assembler implementation.
- /// Offset - The offset of this fragment in its section. This is ~0 until
+ /// The offset of this fragment in its section. This is ~0 until
/// initialized.
uint64_t Offset;
MCSection *Sec)
: MCFragment(FType, HasInstructions, Sec) {}
- /// STI - The MCSubtargetInfo in effect when the instruction was encoded.
- /// must be non-null for instructions.
+ /// The MCSubtargetInfo in effect when the instruction was encoded.
+ /// It must be non-null for instructions.
const MCSubtargetInfo *STI = nullptr;
public:
class MCEncodedFragmentWithFixups :
public MCEncodedFragmentWithContents<ContentsSize> {
- /// Fixups - The list of fixups in this fragment.
+ /// The list of fixups in this fragment.
SmallVector<MCFixup, FixupsSize> Fixups;
protected:
///
class MCRelaxableFragment : public MCEncodedFragmentWithFixups<8, 1> {
- /// Inst - The instruction this is a fragment for.
+ /// The instruction this is a fragment for.
MCInst Inst;
public:
};
class MCAlignFragment : public MCFragment {
- /// Alignment - The alignment to ensure, in bytes.
+ /// The alignment to ensure, in bytes.
unsigned Alignment;
- /// EmitNops - Flag to indicate that (optimal) NOPs should be emitted instead
+ /// Flag to indicate that (optimal) NOPs should be emitted instead
/// of using the provided value. The exact interpretation of this flag is
/// target dependent.
bool EmitNops : 1;
- /// Value - Value to use for filling padding bytes.
+ /// Value to use for filling padding bytes.
int64_t Value;
- /// ValueSize - The size of the integer (in bytes) of \p Value.
+ /// The size of the integer (in bytes) of \p Value.
unsigned ValueSize;
- /// MaxBytesToEmit - The maximum number of bytes to emit; if the alignment
+ /// The maximum number of bytes to emit; if the alignment
/// cannot be satisfied in this width then this fragment is ignored.
unsigned MaxBytesToEmit;
};
class MCLEBFragment : public MCFragment {
- /// Value - The value this fragment should contain.
+ /// The value this fragment should contain.
const MCExpr *Value;
- /// IsSigned - True if this is a sleb128, false if uleb128.
+ /// True if this is a sleb128, false if uleb128.
bool IsSigned;
SmallString<8> Contents;
};
class MCDwarfLineAddrFragment : public MCEncodedFragmentWithFixups<8, 1> {
- /// LineDelta - the value of the difference between the two line numbers
+ /// The value of the difference between the two line numbers
/// between two .loc dwarf directives.
int64_t LineDelta;
- /// AddrDelta - The expression for the difference of the two symbols that
+ /// The expression for the difference of the two symbols that
/// make up the address delta between two .loc dwarf directives.
const MCExpr *AddrDelta;
};
class MCDwarfCallFrameFragment : public MCEncodedFragmentWithFixups<8, 1> {
- /// AddrDelta - The expression for the difference of the two symbols that
+ /// The expression for the difference of the two symbols that
/// make up the address delta between two .cfi_* dwarf directives.
const MCExpr *AddrDelta;
OS << "<MCFragment " << (const void *)this << " LayoutOrder:" << LayoutOrder
<< " Offset:" << Offset << " HasInstructions:" << hasInstructions();
- if (const MCEncodedFragment *EF = dyn_cast<MCEncodedFragment>(this))
+ if (const auto *EF = dyn_cast<MCEncodedFragment>(this))
OS << " BundlePadding:" << static_cast<unsigned>(EF->getBundlePadding());
OS << ">";
switch (getKind()) {
case MCFragment::FT_Align: {
- const MCAlignFragment *AF = cast<MCAlignFragment>(this);
+ const auto *AF = cast<MCAlignFragment>(this);
if (AF->hasEmitNops())
OS << " (emit nops)";
OS << "\n ";
break;
}
case MCFragment::FT_Data: {
- const MCDataFragment *DF = cast<MCDataFragment>(this);
+ const auto *DF = cast<MCDataFragment>(this);
OS << "\n ";
OS << " Contents:[";
const SmallVectorImpl<char> &Contents = DF->getContents();
break;
}
case MCFragment::FT_CompactEncodedInst: {
- const MCCompactEncodedInstFragment *CEIF =
+ const auto *CEIF =
cast<MCCompactEncodedInstFragment>(this);
OS << "\n ";
OS << " Contents:[";
break;
}
case MCFragment::FT_Fill: {
- const MCFillFragment *FF = cast<MCFillFragment>(this);
+ const auto *FF = cast<MCFillFragment>(this);
OS << " Value:" << static_cast<unsigned>(FF->getValue())
<< " ValueSize:" << static_cast<unsigned>(FF->getValueSize())
<< " NumValues:" << FF->getNumValues();
break;
}
case MCFragment::FT_Relaxable: {
- const MCRelaxableFragment *F = cast<MCRelaxableFragment>(this);
+ const auto *F = cast<MCRelaxableFragment>(this);
OS << "\n ";
OS << " Inst:";
F->getInst().dump_pretty(OS);
break;
}
case MCFragment::FT_Org: {
- const MCOrgFragment *OF = cast<MCOrgFragment>(this);
+ const auto *OF = cast<MCOrgFragment>(this);
OS << "\n ";
OS << " Offset:" << OF->getOffset()
<< " Value:" << static_cast<unsigned>(OF->getValue());
break;
}
case MCFragment::FT_Dwarf: {
- const MCDwarfLineAddrFragment *OF = cast<MCDwarfLineAddrFragment>(this);
+ const auto *OF = cast<MCDwarfLineAddrFragment>(this);
OS << "\n ";
OS << " AddrDelta:" << OF->getAddrDelta()
<< " LineDelta:" << OF->getLineDelta();
break;
}
case MCFragment::FT_DwarfFrame: {
- const MCDwarfCallFrameFragment *CF = cast<MCDwarfCallFrameFragment>(this);
+ const auto *CF = cast<MCDwarfCallFrameFragment>(this);
OS << "\n ";
OS << " AddrDelta:" << CF->getAddrDelta();
break;
}
case MCFragment::FT_LEB: {
- const MCLEBFragment *LF = cast<MCLEBFragment>(this);
+ const auto *LF = cast<MCLEBFragment>(this);
OS << "\n ";
OS << " Value:" << LF->getValue() << " Signed:" << LF->isSigned();
break;
break;
}
case MCFragment::FT_SymbolId: {
- const MCSymbolIdFragment *F = cast<MCSymbolIdFragment>(this);
+ const auto *F = cast<MCSymbolIdFragment>(this);
OS << "\n ";
OS << " Sym:" << F->getSymbol();
break;
Invalid,
};
- /// classifyFirstOpcodeInMacroFusion - return the type of the first
- /// instruction in macro-fusion.
+ /// \returns the type of the first instruction in macro-fusion.
inline FirstMacroFusionInstKind
classifyFirstOpcodeInMacroFusion(unsigned Opcode) {
switch (Opcode) {
}
}
- /// classifySecondCondCodeInMacroFusion - return the type of the second
- /// instruction in macro-fusion.
+ /// \returns the type of the second instruction in macro-fusion.
inline SecondMacroFusionInstKind
classifySecondCondCodeInMacroFusion(X86::CondCode CC) {
if (CC == X86::COND_INVALID)
}
}
+ /// \param FirstKind kind of the first instruction in macro fusion.
+ /// \param SecondKind kind of the second instruction in macro fusion.
+ ///
+ /// \returns true if the two instruction can be macro fused.
inline bool isMacroFused(FirstMacroFusionInstKind FirstKind,
SecondMacroFusionInstKind SecondKind) {
switch (FirstKind) {
NOTRACK = 1ULL << NoTrackShift
};
- // getBaseOpcodeFor - This function returns the "base" X86 opcode for the
- // specified machine instruction.
- //
+ /// \returns the "base" X86 opcode for the specified machine
+ /// instruction.
inline uint8_t getBaseOpcodeFor(uint64_t TSFlags) {
return TSFlags >> X86II::OpcodeShift;
}
return (TSFlags & X86II::ImmMask) != 0;
}
- /// getSizeOfImm - Decode the "size of immediate" field from the TSFlags field
- /// of the specified instruction.
+ /// Decode the "size of immediate" field from the TSFlags field of the
+ /// specified instruction.
inline unsigned getSizeOfImm(uint64_t TSFlags) {
switch (TSFlags & X86II::ImmMask) {
default: llvm_unreachable("Unknown immediate size");
}
}
- /// isImmPCRel - Return true if the immediate of the specified instruction's
- /// TSFlags indicates that it is pc relative.
+ /// \returns true if the immediate of the specified instruction's TSFlags
+ /// indicates that it is pc relative.
inline bool isImmPCRel(uint64_t TSFlags) {
switch (TSFlags & X86II::ImmMask) {
default: llvm_unreachable("Unknown immediate size");
}
}
- /// isImmSigned - Return true if the immediate of the specified instruction's
+ /// \returns true if the immediate of the specified instruction's
/// TSFlags indicates that it is signed.
inline bool isImmSigned(uint64_t TSFlags) {
switch (TSFlags & X86II::ImmMask) {
}
}
- /// getOperandBias - compute whether all of the def operands are repeated
- /// in the uses and therefore should be skipped.
+ /// Compute whether all of the def operands are repeated in the uses and
+ /// therefore should be skipped.
/// This determines the start of the unique operand list. We need to determine
/// if all of the defs have a corresponding tied operand in the uses.
/// Unfortunately, the tied operand information is encoded in the uses not
}
}
- /// getMemoryOperandNo - The function returns the MCInst operand # for the
- /// first field of the memory operand. If the instruction doesn't have a
+ /// The function returns the MCInst operand # for the first field of the
+ /// memory operand. If the instruction doesn't have a
/// memory operand, this returns -1.
///
/// Note that this ignores tied operands. If there is a tied register which
}
}
- /// isX86_64ExtendedReg - Is the MachineOperand a x86-64 extended (r8 or
- /// higher) register? e.g. r8, xmm8, xmm13, etc.
+ /// \returns true if the MachineOperand is a x86-64 extended (r8 or
+ /// higher) register, e.g. r8, xmm8, xmm13, etc.
inline bool isX86_64ExtendedReg(unsigned RegNo) {
if ((RegNo >= X86::XMM8 && RegNo <= X86::XMM31) ||
(RegNo >= X86::YMM8 && RegNo <= X86::YMM31) ||
return false;
}
- /// is32ExtendedReg - Is the MemoryOperand a 32 extended (zmm16 or higher)
- /// registers? e.g. zmm21, etc.
+ /// \returns true if the MemoryOperand is a 32 extended (zmm16 or higher)
+ /// registers, e.g. zmm21, etc.
static inline bool is32ExtendedReg(unsigned RegNo) {
return ((RegNo >= X86::XMM16 && RegNo <= X86::XMM31) ||
(RegNo >= X86::YMM16 && RegNo <= X86::YMM31) ||
reg == X86::SIL || reg == X86::DIL);
}
- /// isKMasked - Is this a masked instruction.
+ /// \returns true if this is a masked instruction.
inline bool isKMasked(uint64_t TSFlags) {
return (TSFlags & X86II::EVEX_K) != 0;
}
- /// isKMergedMasked - Is this a merge masked instruction.
+ /// \returns true if this is a merge masked instruction.
inline bool isKMergeMasked(uint64_t TSFlags) {
return isKMasked(TSFlags) && (TSFlags & X86II::EVEX_Z) == 0;
}