ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index f6b68b0..2d69a3b 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -74,6 +74,28 @@
                };
        };
 
+       scpi {
+               compatible = "amlogic,meson-gxbb-scpi";
+               mboxes = <&mailbox 1 &mailbox 2>;
+               shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
+
+               clocks {
+                       compatible = "arm,scpi-clocks";
+
+                       scpi_dvfs: scpi_clocks@0 {
+                               compatible = "arm,scpi-dvfs-clocks";
+                               #clock-cells = <1>;
+                               clock-indices = <0>;
+                               clock-output-names = "vcpu";
+                       };
+               };
+
+               scpi_sensors: sensors {
+                       compatible = "arm,scpi-sensors";
+                       #thermal-sensor-cells = <1>;
+               };
+       };
+
        soc {
                usb0_phy: phy@c0000000 {
                        compatible = "amlogic,meson-gxbb-usb2-phy";
@@ -101,6 +123,16 @@
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x0 0xc8000000 0x14000>;
+
+                       cpu_scp_lpri: scp-shmem@0 {
+                               compatible = "amlogic,meson-gxbb-scp-shmem";
+                               reg = <0x13000 0x400>;
+                       };
+
+                       cpu_scp_hpri: scp-shmem@200 {
+                               compatible = "amlogic,meson-gxbb-scp-shmem";
+                               reg = <0x13400 0x400>;
+                       };
                };
 
                usb0: usb@c9000000 {
@@ -143,6 +175,22 @@
        };
 };
 
+&cpu0 {
+       clocks = <&scpi_dvfs 0>;
+};
+
+&cpu1 {
+       clocks = <&scpi_dvfs 0>;
+};
+
+&cpu2 {
+       clocks = <&scpi_dvfs 0>;
+};
+
+&cpu3 {
+       clocks = <&scpi_dvfs 0>;
+};
+
 &cbus {
        reset: reset-controller@4404 {
                compatible = "amlogic,meson-gxbb-reset";