tools/power turbostat: support Haswell

This patch enables turbostat to run properly on the
next-generation Intel(R) Microarchitecture, code named "Haswell" (HSW).

HSW supports the BCLK and counters found in SNB.

Signed-off-by: Len Brown <len.brown@intel.com>

diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index ce6d460..b326878 100644 (file)
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -1397,6 +1397,9 @@ int has_nehalem_turbo_ratio_limit(unsigned int family, unsigned int model)
        case 0x2D:      /* SNB Xeon */
        case 0x3A:      /* IVB */
        case 0x3E:      /* IVB Xeon */
+       case 0x3C:      /* HSW */
+       case 0x3F:      /* HSW */
+       case 0x45:      /* HSW */
                return 1;
        case 0x2E:      /* Nehalem-EX Xeon - Beckton */
        case 0x2F:      /* Westmere-EX Xeon - Eagleton */
@@ -1488,6 +1491,9 @@ void rapl_probe(unsigned int family, unsigned int model)
        switch (model) {
        case 0x2A:
        case 0x3A:
+       case 0x3C:      /* HSW */
+       case 0x3F:      /* HSW */
+       case 0x45:      /* HSW */
                do_rapl = RAPL_PKG | RAPL_CORES | RAPL_GFX;
                break;
        case 0x2D:
@@ -1724,6 +1730,9 @@ int is_snb(unsigned int family, unsigned int model)
        case 0x2D:
        case 0x3A:      /* IVB */
        case 0x3E:      /* IVB Xeon */
+       case 0x3C:      /* HSW */
+       case 0x3F:      /* HSW */
+       case 0x45:      /* HSW */
                return 1;
        }
        return 0;
@@ -2248,7 +2257,7 @@ int main(int argc, char **argv)
        cmdline(argc, argv);
 
        if (verbose)
-               fprintf(stderr, "turbostat v3.0 November 23, 2012"
+               fprintf(stderr, "turbostat v3.1 January 8, 2013"
                        " - Len Brown <lenb@kernel.org>\n");
 
        turbostat_init();