u16 input_mask; /* 1 = GPIO is input direction, 0 = output */
};
+static int lp3943_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+ struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
+ struct lp3943 *lp3943 = lp3943_gpio->lp3943;
+
+ /* Return an error if the pin is already assigned */
+ if (test_and_set_bit(offset, &lp3943->pin_used))
+ return -EBUSY;
+
+ return 0;
+}
+
+static void lp3943_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+ struct lp3943_gpio *lp3943_gpio = gpiochip_get_data(chip);
+ struct lp3943 *lp3943 = lp3943_gpio->lp3943;
+
+ clear_bit(offset, &lp3943->pin_used);
+}
+
static int lp3943_gpio_set_mode(struct lp3943_gpio *lp3943_gpio, u8 offset,
u8 val)
{
static const struct gpio_chip lp3943_gpio_chip = {
.label = "lp3943",
.owner = THIS_MODULE,
+ .request = lp3943_gpio_request,
+ .free = lp3943_gpio_free,
.direction_input = lp3943_gpio_direction_input,
.get = lp3943_gpio_get,
.direction_output = lp3943_gpio_direction_output,
* @regmap: Used for I2C communication on accessing registers
* @pdata: LP3943 platform specific data
* @mux_cfg: Register configuration for pin MUX
+ * @pin_used: Bit mask for output pin used.
+ * This bitmask is used for pin assignment management.
+ * 1 = pin used, 0 = available.
+ * Only LSB 16 bits are used, but it is unsigned long type
+ * for atomic bitwise operations.
*/
struct lp3943 {
struct device *dev;
struct regmap *regmap;
struct lp3943_platform_data *pdata;
const struct lp3943_reg_cfg *mux_cfg;
+ unsigned long pin_used;
};
int lp3943_read_byte(struct lp3943 *lp3943, u8 reg, u8 *read);