2018-08-27 Tom Tromey <tom@tromey.com>
+ * rs6000-tdep.c (ppc_deal_with_atomic_sequence): Use
+ CORE_ADDR_MAX.
+ * mips-tdep.c (mips_deal_with_atomic_sequence)
+ (micromips_deal_with_atomic_sequence): Use CORE_ADDR_MAX.
+ * arch/arm-get-next-pcs.c (thumb_deal_with_atomic_sequence_raw)
+ (arm_deal_with_atomic_sequence_raw): Use CORE_ADDR_MAX.
+ * alpha-tdep.c (alpha_deal_with_atomic_sequence): Use
+ CORE_ADDR_MAX.
+ * aarch64-tdep.c (aarch64_software_single_step): Use
+ CORE_ADDR_MAX.
+
+2018-08-27 Tom Tromey <tom@tromey.com>
+
* linespec.c (complete_linespec_component): Add cast to "char".
* completer.c (completion_tracker::build_completion_result): Add
cast to "char".
const int insn_size = 4;
const int atomic_sequence_length = 16; /* Instruction sequence length. */
CORE_ADDR pc = regcache_read_pc (regcache);
- CORE_ADDR breaks[2] = { -1, -1 };
+ CORE_ADDR breaks[2] = { CORE_ADDR_MAX, CORE_ADDR_MAX };
CORE_ADDR loc = pc;
CORE_ADDR closing_insn = 0;
uint32_t insn = read_memory_unsigned_integer (loc, insn_size,
static std::vector<CORE_ADDR>
alpha_deal_with_atomic_sequence (struct gdbarch *gdbarch, CORE_ADDR pc)
{
- CORE_ADDR breaks[2] = {-1, -1};
+ CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
CORE_ADDR loc = pc;
CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */
unsigned int insn = alpha_read_insn (gdbarch, loc);
thumb_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
{
int byte_order_for_code = self->byte_order_for_code;
- CORE_ADDR breaks[2] = {-1, -1};
+ CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
CORE_ADDR pc = regcache_read_pc (self->regcache);
CORE_ADDR loc = pc;
unsigned short insn1, insn2;
arm_deal_with_atomic_sequence_raw (struct arm_get_next_pcs *self)
{
int byte_order_for_code = self->byte_order_for_code;
- CORE_ADDR breaks[2] = {-1, -1};
+ CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
CORE_ADDR pc = regcache_read_pc (self->regcache);
CORE_ADDR loc = pc;
unsigned int insn;
static std::vector<CORE_ADDR>
mips_deal_with_atomic_sequence (struct gdbarch *gdbarch, CORE_ADDR pc)
{
- CORE_ADDR breaks[2] = {-1, -1};
+ CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
CORE_ADDR loc = pc;
CORE_ADDR branch_bp; /* Breakpoint at branch instruction's destination. */
ULONGEST insn;
{
const int atomic_sequence_length = 16; /* Instruction sequence length. */
int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
- CORE_ADDR breaks[2] = {-1, -1};
+ CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
CORE_ADDR branch_bp = 0; /* Breakpoint at branch instruction's
destination. */
CORE_ADDR loc = pc;
struct gdbarch *gdbarch = regcache->arch ();
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR pc = regcache_read_pc (regcache);
- CORE_ADDR breaks[2] = {-1, -1};
+ CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
CORE_ADDR loc = pc;
CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */
int insn = read_memory_integer (loc, PPC_INSN_SIZE, byte_order);