clk: renesas: rcar-gen3: Add ADG clocks
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Mon, 31 Jul 2023 23:49:34 +0000 (23:49 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 15 Aug 2023 09:34:43 +0000 (11:34 +0200)
R-Car Sound needs to enable "ADG" on RMSTPCR9/SMSTPCR9 bit 22 to use
clk_i which came from the internal S0D4 or ZA2 clock.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Vincenzo De Michele <vincenzo.michele@davinci.de> # R-Car M3-N
Tested-by: Patrick Keil <patrick.keil@conti-engineering.com> # R-Car M3-N
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/87pm47prox.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87o7jrpros.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87mszbpron.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87leevproh.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87jzufprod.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87il9zpro8.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87h6pjpro4.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87fs53prny.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87edknprnt.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a774a1-cpg-mssr.c
drivers/clk/renesas/r8a774b1-cpg-mssr.c
drivers/clk/renesas/r8a774c0-cpg-mssr.c
drivers/clk/renesas/r8a774e1-cpg-mssr.c
drivers/clk/renesas/r8a7795-cpg-mssr.c
drivers/clk/renesas/r8a7796-cpg-mssr.c
drivers/clk/renesas/r8a77965-cpg-mssr.c
drivers/clk/renesas/r8a77990-cpg-mssr.c
drivers/clk/renesas/r8a77995-cpg-mssr.c

index 7e70c9a..aba043f 100644 (file)
@@ -215,6 +215,7 @@ static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = {
        DEF_MOD("rpc-if",                917,   R8A774A1_CLK_RPCD2),
        DEF_MOD("i2c6",                  918,   R8A774A1_CLK_S0D6),
        DEF_MOD("i2c5",                  919,   R8A774A1_CLK_S0D6),
+       DEF_MOD("adg",                   922,   R8A774A1_CLK_S0D4),
        DEF_MOD("iic-pmic",              926,   R8A774A1_CLK_CP),
        DEF_MOD("i2c4",                  927,   R8A774A1_CLK_S0D6),
        DEF_MOD("i2c3",                  928,   R8A774A1_CLK_S0D6),
index 33d4e5f..a3244e7 100644 (file)
@@ -211,6 +211,7 @@ static const struct mssr_mod_clk r8a774b1_mod_clks[] __initconst = {
        DEF_MOD("rpc-if",                917,   R8A774B1_CLK_RPCD2),
        DEF_MOD("i2c6",                  918,   R8A774B1_CLK_S0D6),
        DEF_MOD("i2c5",                  919,   R8A774B1_CLK_S0D6),
+       DEF_MOD("adg",                   922,   R8A774B1_CLK_S0D4),
        DEF_MOD("iic-pmic",              926,   R8A774B1_CLK_CP),
        DEF_MOD("i2c4",                  927,   R8A774B1_CLK_S0D6),
        DEF_MOD("i2c3",                  928,   R8A774B1_CLK_S0D6),
index c9c8fde..870f8c5 100644 (file)
@@ -211,6 +211,7 @@ static const struct mssr_mod_clk r8a774c0_mod_clks[] __initconst = {
        DEF_MOD("rpc-if",                917,   R8A774C0_CLK_RPCD2),
        DEF_MOD("i2c6",                  918,   R8A774C0_CLK_S3D2),
        DEF_MOD("i2c5",                  919,   R8A774C0_CLK_S3D2),
+       DEF_MOD("adg",                   922,   R8A774C0_CLK_ZA2),
        DEF_MOD("iic-pmic",              926,   R8A774C0_CLK_CP),
        DEF_MOD("i2c4",                  927,   R8A774C0_CLK_S3D2),
        DEF_MOD("i2c3",                  928,   R8A774C0_CLK_S3D2),
index 13fed5e..7158464 100644 (file)
@@ -223,7 +223,7 @@ static const struct mssr_mod_clk r8a774e1_mod_clks[] __initconst = {
        DEF_MOD("rpc-if",                917,   R8A774E1_CLK_RPCD2),
        DEF_MOD("i2c6",                  918,   R8A774E1_CLK_S0D6),
        DEF_MOD("i2c5",                  919,   R8A774E1_CLK_S0D6),
-       DEF_MOD("adg",                   922,   R8A774E1_CLK_S0D1),
+       DEF_MOD("adg",                   922,   R8A774E1_CLK_S0D4),
        DEF_MOD("iic-pmic",              926,   R8A774E1_CLK_CP),
        DEF_MOD("i2c4",                  927,   R8A774E1_CLK_S0D6),
        DEF_MOD("i2c3",                  928,   R8A774E1_CLK_S0D6),
index c08d931..ad20b33 100644 (file)
@@ -253,6 +253,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
        DEF_MOD("rpc-if",                917,   R8A7795_CLK_RPCD2),
        DEF_MOD("i2c6",                  918,   R8A7795_CLK_S0D6),
        DEF_MOD("i2c5",                  919,   R8A7795_CLK_S0D6),
+       DEF_MOD("adg",                   922,   R8A7795_CLK_S0D4),
        DEF_MOD("i2c-dvfs",              926,   R8A7795_CLK_CP),
        DEF_MOD("i2c4",                  927,   R8A7795_CLK_S0D6),
        DEF_MOD("i2c3",                  928,   R8A7795_CLK_S0D6),
index 0bfd077..e5f9e3e 100644 (file)
@@ -238,6 +238,7 @@ static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = {
        DEF_MOD("rpc-if",                917,   R8A7796_CLK_RPCD2),
        DEF_MOD("i2c6",                  918,   R8A7796_CLK_S0D6),
        DEF_MOD("i2c5",                  919,   R8A7796_CLK_S0D6),
+       DEF_MOD("adg",                   922,   R8A7796_CLK_S0D4),
        DEF_MOD("i2c-dvfs",              926,   R8A7796_CLK_CP),
        DEF_MOD("i2c4",                  927,   R8A7796_CLK_S0D6),
        DEF_MOD("i2c3",                  928,   R8A7796_CLK_S0D6),
index e455ec0..219e41a 100644 (file)
@@ -238,6 +238,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
        DEF_MOD("rpc-if",               917,    R8A77965_CLK_RPCD2),
        DEF_MOD("i2c6",                 918,    R8A77965_CLK_S0D6),
        DEF_MOD("i2c5",                 919,    R8A77965_CLK_S0D6),
+       DEF_MOD("adg",                  922,    R8A77965_CLK_S0D4),
        DEF_MOD("i2c-dvfs",             926,    R8A77965_CLK_CP),
        DEF_MOD("i2c4",                 927,    R8A77965_CLK_S0D6),
        DEF_MOD("i2c3",                 928,    R8A77965_CLK_S0D6),
index b666d09..b2f82c5 100644 (file)
@@ -224,6 +224,7 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = {
        DEF_MOD("rpc-if",                917,   R8A77990_CLK_RPCD2),
        DEF_MOD("i2c6",                  918,   R8A77990_CLK_S3D2),
        DEF_MOD("i2c5",                  919,   R8A77990_CLK_S3D2),
+       DEF_MOD("adg",                   922,   R8A77990_CLK_ZA2),
        DEF_MOD("i2c-dvfs",              926,   R8A77990_CLK_CP),
        DEF_MOD("i2c4",                  927,   R8A77990_CLK_S3D2),
        DEF_MOD("i2c3",                  928,   R8A77990_CLK_S3D2),
index 3a73f6f..162fa86 100644 (file)
@@ -181,6 +181,7 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = {
        DEF_MOD("can-if1",               915,   R8A77995_CLK_S3D4),
        DEF_MOD("can-if0",               916,   R8A77995_CLK_S3D4),
        DEF_MOD("rpc-if",                917,   R8A77995_CLK_RPCD2),
+       DEF_MOD("adg",                   922,   R8A77995_CLK_ZA2),
        DEF_MOD("i2c3",                  928,   R8A77995_CLK_S3D2),
        DEF_MOD("i2c2",                  929,   R8A77995_CLK_S3D2),
        DEF_MOD("i2c1",                  930,   R8A77995_CLK_S3D2),