ARM: dts: sun9i: Add USB host controller nodes to a80 dtsi

The A80 has 3 EHCI/OHCI USB controllers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 7e7a369..2f7f82c 100644 (file)
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -345,6 +345,28 @@
                 */
                ranges = <0 0 0 0x20000000>;
 
+               ehci0: usb@00a00000 {
+                       compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
+                       reg = <0x00a00000 0x100>;
+                       interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&usb_mod_clk 1>;
+                       resets = <&usb_mod_clk 17>;
+                       phys = <&usbphy1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ohci0: usb@00a00400 {
+                       compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
+                       reg = <0x00a00400 0x100>;
+                       interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&usb_mod_clk 1>, <&usb_mod_clk 2>;
+                       resets = <&usb_mod_clk 17>;
+                       phys = <&usbphy1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
                usbphy1: phy@00a00800 {
                        compatible = "allwinner,sun9i-a80-usb-phy";
                        reg = <0x00a00800 0x4>;
@@ -356,6 +378,17 @@
                        #phy-cells = <0>;
                };
 
+               ehci1: usb@00a01000 {
+                       compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
+                       reg = <0x00a01000 0x100>;
+                       interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&usb_mod_clk 3>;
+                       resets = <&usb_mod_clk 18>;
+                       phys = <&usbphy2>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
                usbphy2: phy@00a01800 {
                        compatible = "allwinner,sun9i-a80-usb-phy";
                        reg = <0x00a01800 0x4>;
@@ -370,6 +403,28 @@
                        phy_type = "hsic";
                };
 
+               ehci2: usb@00a02000 {
+                       compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
+                       reg = <0x00a02000 0x100>;
+                       interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&usb_mod_clk 5>;
+                       resets = <&usb_mod_clk 19>;
+                       phys = <&usbphy3>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ohci2: usb@00a02400 {
+                       compatible = "allwinner,sun9i-a80-ohci", "generic-ohci";
+                       reg = <0x00a02400 0x100>;
+                       interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&usb_mod_clk 5>, <&usb_mod_clk 6>;
+                       resets = <&usb_mod_clk 19>;
+                       phys = <&usbphy3>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
                usbphy3: phy@00a02800 {
                        compatible = "allwinner,sun9i-a80-usb-phy";
                        reg = <0x00a02800 0x4>;