s5p6442: smdk6442: Enable onenand(except write)

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>

diff --git a/board/samsung/smdk6442/onenand.c b/board/samsung/smdk6442/onenand.c
index cfa0c46..17894cb 100644 (file)
--- a/board/samsung/smdk6442/onenand.c
+++ b/board/samsung/smdk6442/onenand.c
@@ -34,52 +34,8 @@
 
 void onenand_board_init(struct mtd_info *mtd)
 {
-#if 0
        struct onenand_chip *this = mtd->priv;
-       struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
-       struct samsung_onenand *onenand;
-       int value;
 
-       this->base = (void *)S5PC100_ONENAND_BASE;
-       onenand = (struct samsung_onenand *)this->base;
-
-       /* D0 Domain memory clock gating */
-       value = readl(&clk->gate_d01);
-       value &= ~(1 << 2);             /* CLK_ONENANDC */
-       value |= (1 << 2);
-       writel(value, &clk->gate_d01);
-
-       value = readl(&clk->src0);
-       value &= ~(1 << 24);            /* MUX_1nand: 0 from HCLKD0 */
-       value &= ~(1 << 20);            /* MUX_HREF: 0 from FIN_27M */
-       writel(value, &clk->src0);
-
-       value = readl(&clk->div1);
-       value &= ~(3 << 16);            /* PCLKD1_RATIO */
-       value |= (1 << 16);
-       writel(value, &clk->div1);
-
-       writel(ONENAND_MEM_RESET_COLD, &onenand->mem_reset);
-
-       while (!(readl(&onenand->int_err_stat) & RST_CMP))
-               continue;
-
-       writel(RST_CMP, &onenand->int_err_ack);
-
-       /*
-        * Access_Clock [2:0]
-        * 166 MHz, 134 Mhz : 3
-        * 100 Mhz, 60 Mhz  : 2
-        */
-       writel(0x3, &onenand->acc_clock);
-
-       writel(INT_ERR_ALL, &onenand->int_err_mask);
-       writel(1 << 0, &onenand->int_pin_en);   /* Enable */
-
-       value = readl(&onenand->int_err_mask);
-       value &= ~RDY_ACT;
-       writel(value, &onenand->int_err_mask);
-
-       s3c_onenand_init(mtd);
-#endif
+       this->base = (void *) 0xB0000000;
+       this->options |= ONENAND_RUNTIME_BADBLOCK_CHECK;
 }

diff --git a/board/samsung/smdk6442/smdk6442.c b/board/samsung/smdk6442/smdk6442.c
index e1b319d..78b0b4f 100644 (file)
--- a/board/samsung/smdk6442/smdk6442.c
+++ b/board/samsung/smdk6442/smdk6442.c
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
 {
-       gd->bd->bi_arch_number = MACH_TYPE_SMDKC100;
+       gd->bd->bi_arch_number = MACH_TYPE_SMDK6442;
        gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
 
        return 0;

diff --git a/include/configs/smdk6442.h b/include/configs/smdk6442.h
index 23bbb3f..70a8981 100644 (file)
--- a/include/configs/smdk6442.h
+++ b/include/configs/smdk6442.h
@@ -103,9 +103,7 @@
 #undef CONFIG_CMD_NET
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_REGINFO
-#if 0
 #define CONFIG_CMD_ONENAND
-#endif
 #define CONFIG_CMD_MTDPARTS
 #if 0
 #define CONFIG_CMD_I2C
@@ -254,10 +252,10 @@
 /*#define CONFIG_CLK_467_117_59*/
 /*#define CONFIG_CLK_400_100_50*/
 
-/* Universal has 2 banks of DRAM, but swap the bank */
+/* S5P6442 has 1 banks of DRAM */
 #define CONFIG_NR_DRAM_BANKS   1
-#define PHYS_SDRAM_1           CONFIG_SYS_SDRAM_BASE   /* OneDRAM Bank #0 */
-#define PHYS_SDRAM_1_SIZE      (80 << 20)              /* 80 MB in Bank #0 */
+#define PHYS_SDRAM_1           CONFIG_SYS_SDRAM_BASE   /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE      (128 << 20)             /* 128 MB in Bank #1 */
 
 #define CONFIG_SYS_MONITOR_BASE        0x00000000
 
@@ -270,11 +268,7 @@
 /* OneNAND IPL uses 8KiB */
 #define CONFIG_ONENAND_START_PAGE      4
 
-#if 0
 #define CONFIG_ENV_IS_IN_ONENAND       1
-#else
-#define        CONFIG_ENV_IS_NOWHERE           1
-#endif
 #define CONFIG_ENV_SIZE                        (256 << 10)     /* 256 KiB, 0x40000 */
 #define CONFIG_ENV_ADDR                        (256 << 10)     /* 256 KiB, 0x40000 */
 #define CONFIG_ENV_OFFSET              (256 << 10)     /* 256 KiB, 0x40000 */