[mips] .reginfo is 8 byte aligned on N32.

Differential Revision: http://reviews.llvm.org/D4540

llvm-svn: 213246

diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
index e017a27..4e72169 100644 (file)
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
@@ -366,7 +366,8 @@ void MipsTargetELFStreamer::finish() {
     const MCSectionELF *Sec =
         Context.getELFSection(".reginfo", ELF::SHT_MIPS_REGINFO, ELF::SHF_ALLOC,
                               SectionKind::getMetadata(), 24, "");
-    MCA.getOrCreateSectionData(*Sec).setAlignment(4);
+    MCA.getOrCreateSectionData(*Sec)
+        .setAlignment(Features & Mips::FeatureN32 ? 8 : 4);
     OS.SwitchSection(Sec);
 
     OS.EmitIntValue(0, 4); // ri_gprmask

diff --git a/llvm/test/MC/Mips/elf_reginfo.s b/llvm/test/MC/Mips/elf_reginfo.s
index b88607a..ba4788a 100644 (file)
--- a/llvm/test/MC/Mips/elf_reginfo.s
+++ b/llvm/test/MC/Mips/elf_reginfo.s
@@ -27,6 +27,6 @@
 # CHECK_32-LABEL:    Name: .reginfo
 # CHECK_32-NEXT:     Type:  SHT_MIPS_REGINFO
 # CHECK_32-NEXT:     Flags [ (0x2)
-# CHECK_32:          AddressAlignment: 4
+# CHECK_32:          AddressAlignment: 8
 # CHECK_32:          EntrySize: 24
 # CHECK_32-LABEL:  }