; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-none-none-eabi -verify-machineinstrs %s -o - | FileCheck %s
+; RUN: llc -mtriple=aarch64-none-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,SDISEL
+; RUN: llc -mtriple=aarch64-none-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,GISEL
define i32 @and_eq_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_eq_eq:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, eq
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_eq_eq:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, eq
+; SDISEL-NEXT: cset w0, eq
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_eq_eq:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, eq
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, eq
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp eq i32 %s0, %s1
%c1 = icmp eq i32 %s2, %s3
}
define i32 @and_eq_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_eq_ne:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, eq
-; CHECK-NEXT: cset w0, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_eq_ne:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, eq
+; SDISEL-NEXT: cset w0, ne
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_eq_ne:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, eq
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ne
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp eq i32 %s0, %s1
%c1 = icmp ne i32 %s2, %s3
}
define i32 @and_eq_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_eq_ult:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, eq
-; CHECK-NEXT: cset w0, lo
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_eq_ult:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, eq
+; SDISEL-NEXT: cset w0, lo
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_eq_ult:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, eq
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lo
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp eq i32 %s0, %s1
%c1 = icmp ult i32 %s2, %s3
}
define i32 @and_eq_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_eq_ule:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, eq
-; CHECK-NEXT: cset w0, ls
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_eq_ule:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, eq
+; SDISEL-NEXT: cset w0, ls
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_eq_ule:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, eq
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ls
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp eq i32 %s0, %s1
%c1 = icmp ule i32 %s2, %s3
}
define i32 @and_eq_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_eq_ugt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, eq
-; CHECK-NEXT: cset w0, hi
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_eq_ugt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, eq
+; SDISEL-NEXT: cset w0, hi
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_eq_ugt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, eq
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hi
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp eq i32 %s0, %s1
%c1 = icmp ugt i32 %s2, %s3
}
define i32 @and_eq_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_eq_uge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, eq
-; CHECK-NEXT: cset w0, hs
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_eq_uge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, eq
+; SDISEL-NEXT: cset w0, hs
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_eq_uge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, eq
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hs
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp eq i32 %s0, %s1
%c1 = icmp uge i32 %s2, %s3
}
define i32 @and_eq_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_eq_slt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, eq
-; CHECK-NEXT: cset w0, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_eq_slt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, eq
+; SDISEL-NEXT: cset w0, lt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_eq_slt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, eq
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp eq i32 %s0, %s1
%c1 = icmp slt i32 %s2, %s3
}
define i32 @and_eq_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_eq_sle:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, eq
-; CHECK-NEXT: cset w0, le
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_eq_sle:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, eq
+; SDISEL-NEXT: cset w0, le
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_eq_sle:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, eq
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, le
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp eq i32 %s0, %s1
%c1 = icmp sle i32 %s2, %s3
}
define i32 @and_eq_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_eq_sgt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, eq
-; CHECK-NEXT: cset w0, gt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_eq_sgt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, eq
+; SDISEL-NEXT: cset w0, gt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_eq_sgt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, eq
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, gt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp eq i32 %s0, %s1
%c1 = icmp sgt i32 %s2, %s3
}
define i32 @and_eq_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_eq_sge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #8, eq
-; CHECK-NEXT: cset w0, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_eq_sge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #8, eq
+; SDISEL-NEXT: cset w0, ge
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_eq_sge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, eq
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ge
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp eq i32 %s0, %s1
%c1 = icmp sge i32 %s2, %s3
}
define i32 @and_ne_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ne_eq:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ne
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ne_eq:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ne
+; SDISEL-NEXT: cset w0, eq
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ne_eq:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ne
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, eq
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ne i32 %s0, %s1
%c1 = icmp eq i32 %s2, %s3
}
define i32 @and_ne_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ne_ne:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, ne
-; CHECK-NEXT: cset w0, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ne_ne:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, ne
+; SDISEL-NEXT: cset w0, ne
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ne_ne:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ne
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ne
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ne i32 %s0, %s1
%c1 = icmp ne i32 %s2, %s3
}
define i32 @and_ne_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ne_ult:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, ne
-; CHECK-NEXT: cset w0, lo
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ne_ult:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, ne
+; SDISEL-NEXT: cset w0, lo
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ne_ult:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ne
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lo
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ne i32 %s0, %s1
%c1 = icmp ult i32 %s2, %s3
}
define i32 @and_ne_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ne_ule:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, ne
-; CHECK-NEXT: cset w0, ls
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ne_ule:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, ne
+; SDISEL-NEXT: cset w0, ls
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ne_ule:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ne
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ls
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ne i32 %s0, %s1
%c1 = icmp ule i32 %s2, %s3
}
define i32 @and_ne_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ne_ugt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ne
-; CHECK-NEXT: cset w0, hi
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ne_ugt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ne
+; SDISEL-NEXT: cset w0, hi
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ne_ugt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ne
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hi
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ne i32 %s0, %s1
%c1 = icmp ugt i32 %s2, %s3
}
define i32 @and_ne_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ne_uge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ne
-; CHECK-NEXT: cset w0, hs
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ne_uge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ne
+; SDISEL-NEXT: cset w0, hs
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ne_uge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ne
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hs
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ne i32 %s0, %s1
%c1 = icmp uge i32 %s2, %s3
}
define i32 @and_ne_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ne_slt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ne
-; CHECK-NEXT: cset w0, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ne_slt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ne
+; SDISEL-NEXT: cset w0, lt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ne_slt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ne
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ne i32 %s0, %s1
%c1 = icmp slt i32 %s2, %s3
}
define i32 @and_ne_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ne_sle:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ne
-; CHECK-NEXT: cset w0, le
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ne_sle:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ne
+; SDISEL-NEXT: cset w0, le
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ne_sle:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ne
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, le
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ne i32 %s0, %s1
%c1 = icmp sle i32 %s2, %s3
}
define i32 @and_ne_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ne_sgt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, ne
-; CHECK-NEXT: cset w0, gt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ne_sgt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, ne
+; SDISEL-NEXT: cset w0, gt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ne_sgt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ne
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, gt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ne i32 %s0, %s1
%c1 = icmp sgt i32 %s2, %s3
}
define i32 @and_ne_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ne_sge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #8, ne
-; CHECK-NEXT: cset w0, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ne_sge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #8, ne
+; SDISEL-NEXT: cset w0, ge
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ne_sge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ne
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ge
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ne i32 %s0, %s1
%c1 = icmp sge i32 %s2, %s3
}
define i32 @and_ult_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ult_eq:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, lo
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ult_eq:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, lo
+; SDISEL-NEXT: cset w0, eq
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ult_eq:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lo
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, eq
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ult i32 %s0, %s1
%c1 = icmp eq i32 %s2, %s3
}
define i32 @and_ult_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ult_ne:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, lo
-; CHECK-NEXT: cset w0, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ult_ne:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, lo
+; SDISEL-NEXT: cset w0, ne
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ult_ne:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lo
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ne
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ult i32 %s0, %s1
%c1 = icmp ne i32 %s2, %s3
}
define i32 @and_ult_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ult_ult:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, lo
-; CHECK-NEXT: cset w0, lo
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ult_ult:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, lo
+; SDISEL-NEXT: cset w0, lo
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ult_ult:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lo
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lo
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ult i32 %s0, %s1
%c1 = icmp ult i32 %s2, %s3
}
define i32 @and_ult_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ult_ule:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, lo
-; CHECK-NEXT: cset w0, ls
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ult_ule:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, lo
+; SDISEL-NEXT: cset w0, ls
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ult_ule:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lo
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ls
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ult i32 %s0, %s1
%c1 = icmp ule i32 %s2, %s3
}
define i32 @and_ult_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ult_ugt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, lo
-; CHECK-NEXT: cset w0, hi
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ult_ugt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, lo
+; SDISEL-NEXT: cset w0, hi
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ult_ugt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lo
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hi
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ult i32 %s0, %s1
%c1 = icmp ugt i32 %s2, %s3
}
define i32 @and_ult_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ult_uge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, lo
-; CHECK-NEXT: cset w0, hs
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ult_uge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, lo
+; SDISEL-NEXT: cset w0, hs
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ult_uge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lo
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hs
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ult i32 %s0, %s1
%c1 = icmp uge i32 %s2, %s3
}
define i32 @and_ult_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ult_slt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, lo
-; CHECK-NEXT: cset w0, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ult_slt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, lo
+; SDISEL-NEXT: cset w0, lt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ult_slt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lo
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ult i32 %s0, %s1
%c1 = icmp slt i32 %s2, %s3
}
define i32 @and_ult_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ult_sle:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, lo
-; CHECK-NEXT: cset w0, le
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ult_sle:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, lo
+; SDISEL-NEXT: cset w0, le
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ult_sle:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lo
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, le
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ult i32 %s0, %s1
%c1 = icmp sle i32 %s2, %s3
}
define i32 @and_ult_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ult_sgt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, lo
-; CHECK-NEXT: cset w0, gt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ult_sgt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, lo
+; SDISEL-NEXT: cset w0, gt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ult_sgt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lo
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, gt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ult i32 %s0, %s1
%c1 = icmp sgt i32 %s2, %s3
}
define i32 @and_ult_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ult_sge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #8, lo
-; CHECK-NEXT: cset w0, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ult_sge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #8, lo
+; SDISEL-NEXT: cset w0, ge
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ult_sge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lo
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ge
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ult i32 %s0, %s1
%c1 = icmp sge i32 %s2, %s3
}
define i32 @and_ule_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ule_eq:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ls
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ule_eq:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ls
+; SDISEL-NEXT: cset w0, eq
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ule_eq:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ls
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, eq
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ule i32 %s0, %s1
%c1 = icmp eq i32 %s2, %s3
}
define i32 @and_ule_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ule_ne:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, ls
-; CHECK-NEXT: cset w0, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ule_ne:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, ls
+; SDISEL-NEXT: cset w0, ne
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ule_ne:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ls
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ne
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ule i32 %s0, %s1
%c1 = icmp ne i32 %s2, %s3
}
define i32 @and_ule_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ule_ult:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, ls
-; CHECK-NEXT: cset w0, lo
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ule_ult:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, ls
+; SDISEL-NEXT: cset w0, lo
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ule_ult:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ls
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lo
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ule i32 %s0, %s1
%c1 = icmp ult i32 %s2, %s3
}
define i32 @and_ule_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ule_ule:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, ls
-; CHECK-NEXT: cset w0, ls
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ule_ule:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, ls
+; SDISEL-NEXT: cset w0, ls
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ule_ule:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ls
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ls
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ule i32 %s0, %s1
%c1 = icmp ule i32 %s2, %s3
}
define i32 @and_ule_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ule_ugt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ls
-; CHECK-NEXT: cset w0, hi
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ule_ugt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ls
+; SDISEL-NEXT: cset w0, hi
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ule_ugt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ls
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hi
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ule i32 %s0, %s1
%c1 = icmp ugt i32 %s2, %s3
}
define i32 @and_ule_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ule_uge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ls
-; CHECK-NEXT: cset w0, hs
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ule_uge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ls
+; SDISEL-NEXT: cset w0, hs
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ule_uge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ls
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hs
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ule i32 %s0, %s1
%c1 = icmp uge i32 %s2, %s3
}
define i32 @and_ule_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ule_slt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ls
-; CHECK-NEXT: cset w0, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ule_slt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ls
+; SDISEL-NEXT: cset w0, lt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ule_slt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ls
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ule i32 %s0, %s1
%c1 = icmp slt i32 %s2, %s3
}
define i32 @and_ule_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ule_sle:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ls
-; CHECK-NEXT: cset w0, le
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ule_sle:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ls
+; SDISEL-NEXT: cset w0, le
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ule_sle:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ls
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, le
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ule i32 %s0, %s1
%c1 = icmp sle i32 %s2, %s3
}
define i32 @and_ule_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ule_sgt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, ls
-; CHECK-NEXT: cset w0, gt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ule_sgt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, ls
+; SDISEL-NEXT: cset w0, gt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ule_sgt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ls
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, gt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ule i32 %s0, %s1
%c1 = icmp sgt i32 %s2, %s3
}
define i32 @and_ule_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ule_sge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #8, ls
-; CHECK-NEXT: cset w0, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ule_sge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #8, ls
+; SDISEL-NEXT: cset w0, ge
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ule_sge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ls
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ge
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ule i32 %s0, %s1
%c1 = icmp sge i32 %s2, %s3
}
define i32 @and_ugt_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ugt_eq:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, hi
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ugt_eq:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, hi
+; SDISEL-NEXT: cset w0, eq
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ugt_eq:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hi
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, eq
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ugt i32 %s0, %s1
%c1 = icmp eq i32 %s2, %s3
}
define i32 @and_ugt_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ugt_ne:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, hi
-; CHECK-NEXT: cset w0, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ugt_ne:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, hi
+; SDISEL-NEXT: cset w0, ne
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ugt_ne:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hi
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ne
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ugt i32 %s0, %s1
%c1 = icmp ne i32 %s2, %s3
}
define i32 @and_ugt_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ugt_ult:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, hi
-; CHECK-NEXT: cset w0, lo
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ugt_ult:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, hi
+; SDISEL-NEXT: cset w0, lo
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ugt_ult:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hi
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lo
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ugt i32 %s0, %s1
%c1 = icmp ult i32 %s2, %s3
}
define i32 @and_ugt_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ugt_ule:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, hi
-; CHECK-NEXT: cset w0, ls
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ugt_ule:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, hi
+; SDISEL-NEXT: cset w0, ls
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ugt_ule:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hi
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ls
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ugt i32 %s0, %s1
%c1 = icmp ule i32 %s2, %s3
}
define i32 @and_ugt_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ugt_ugt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, hi
-; CHECK-NEXT: cset w0, hi
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ugt_ugt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, hi
+; SDISEL-NEXT: cset w0, hi
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ugt_ugt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hi
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hi
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ugt i32 %s0, %s1
%c1 = icmp ugt i32 %s2, %s3
}
define i32 @and_ugt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ugt_uge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, hi
-; CHECK-NEXT: cset w0, hs
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ugt_uge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, hi
+; SDISEL-NEXT: cset w0, hs
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ugt_uge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hi
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hs
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ugt i32 %s0, %s1
%c1 = icmp uge i32 %s2, %s3
}
define i32 @and_ugt_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ugt_slt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, hi
-; CHECK-NEXT: cset w0, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ugt_slt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, hi
+; SDISEL-NEXT: cset w0, lt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ugt_slt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hi
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ugt i32 %s0, %s1
%c1 = icmp slt i32 %s2, %s3
}
define i32 @and_ugt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ugt_sle:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, hi
-; CHECK-NEXT: cset w0, le
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ugt_sle:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, hi
+; SDISEL-NEXT: cset w0, le
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ugt_sle:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hi
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, le
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ugt i32 %s0, %s1
%c1 = icmp sle i32 %s2, %s3
}
define i32 @and_ugt_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ugt_sgt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, hi
-; CHECK-NEXT: cset w0, gt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ugt_sgt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, hi
+; SDISEL-NEXT: cset w0, gt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ugt_sgt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hi
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, gt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ugt i32 %s0, %s1
%c1 = icmp sgt i32 %s2, %s3
}
define i32 @and_ugt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_ugt_sge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #8, hi
-; CHECK-NEXT: cset w0, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_ugt_sge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #8, hi
+; SDISEL-NEXT: cset w0, ge
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_ugt_sge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hi
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ge
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp ugt i32 %s0, %s1
%c1 = icmp sge i32 %s2, %s3
}
define i32 @and_uge_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_uge_eq:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, hs
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_uge_eq:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, hs
+; SDISEL-NEXT: cset w0, eq
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_uge_eq:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hs
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, eq
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp uge i32 %s0, %s1
%c1 = icmp eq i32 %s2, %s3
}
define i32 @and_uge_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_uge_ne:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, hs
-; CHECK-NEXT: cset w0, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_uge_ne:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, hs
+; SDISEL-NEXT: cset w0, ne
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_uge_ne:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hs
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ne
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp uge i32 %s0, %s1
%c1 = icmp ne i32 %s2, %s3
}
define i32 @and_uge_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_uge_ult:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, hs
-; CHECK-NEXT: cset w0, lo
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_uge_ult:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, hs
+; SDISEL-NEXT: cset w0, lo
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_uge_ult:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hs
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lo
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp uge i32 %s0, %s1
%c1 = icmp ult i32 %s2, %s3
}
define i32 @and_uge_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_uge_ule:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, hs
-; CHECK-NEXT: cset w0, ls
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_uge_ule:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, hs
+; SDISEL-NEXT: cset w0, ls
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_uge_ule:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hs
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ls
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp uge i32 %s0, %s1
%c1 = icmp ule i32 %s2, %s3
}
define i32 @and_uge_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_uge_ugt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, hs
-; CHECK-NEXT: cset w0, hi
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_uge_ugt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, hs
+; SDISEL-NEXT: cset w0, hi
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_uge_ugt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hs
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hi
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp uge i32 %s0, %s1
%c1 = icmp ugt i32 %s2, %s3
}
define i32 @and_uge_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_uge_uge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, hs
-; CHECK-NEXT: cset w0, hs
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_uge_uge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, hs
+; SDISEL-NEXT: cset w0, hs
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_uge_uge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hs
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hs
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp uge i32 %s0, %s1
%c1 = icmp uge i32 %s2, %s3
}
define i32 @and_uge_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_uge_slt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, hs
-; CHECK-NEXT: cset w0, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_uge_slt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, hs
+; SDISEL-NEXT: cset w0, lt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_uge_slt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hs
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp uge i32 %s0, %s1
%c1 = icmp slt i32 %s2, %s3
}
define i32 @and_uge_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_uge_sle:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, hs
-; CHECK-NEXT: cset w0, le
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_uge_sle:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, hs
+; SDISEL-NEXT: cset w0, le
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_uge_sle:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hs
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, le
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp uge i32 %s0, %s1
%c1 = icmp sle i32 %s2, %s3
}
define i32 @and_uge_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_uge_sgt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, hs
-; CHECK-NEXT: cset w0, gt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_uge_sgt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, hs
+; SDISEL-NEXT: cset w0, gt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_uge_sgt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hs
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, gt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp uge i32 %s0, %s1
%c1 = icmp sgt i32 %s2, %s3
}
define i32 @and_uge_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_uge_sge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #8, hs
-; CHECK-NEXT: cset w0, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_uge_sge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #8, hs
+; SDISEL-NEXT: cset w0, ge
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_uge_sge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, hs
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ge
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp uge i32 %s0, %s1
%c1 = icmp sge i32 %s2, %s3
}
define i32 @and_slt_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_slt_eq:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, lt
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_slt_eq:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, lt
+; SDISEL-NEXT: cset w0, eq
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_slt_eq:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, eq
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp slt i32 %s0, %s1
%c1 = icmp eq i32 %s2, %s3
}
define i32 @and_slt_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_slt_ne:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, lt
-; CHECK-NEXT: cset w0, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_slt_ne:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, lt
+; SDISEL-NEXT: cset w0, ne
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_slt_ne:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ne
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp slt i32 %s0, %s1
%c1 = icmp ne i32 %s2, %s3
}
define i32 @and_slt_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_slt_ult:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, lt
-; CHECK-NEXT: cset w0, lo
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_slt_ult:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, lt
+; SDISEL-NEXT: cset w0, lo
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_slt_ult:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lo
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp slt i32 %s0, %s1
%c1 = icmp ult i32 %s2, %s3
}
define i32 @and_slt_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_slt_ule:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, lt
-; CHECK-NEXT: cset w0, ls
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_slt_ule:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, lt
+; SDISEL-NEXT: cset w0, ls
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_slt_ule:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ls
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp slt i32 %s0, %s1
%c1 = icmp ule i32 %s2, %s3
}
define i32 @and_slt_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_slt_ugt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, lt
-; CHECK-NEXT: cset w0, hi
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_slt_ugt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, lt
+; SDISEL-NEXT: cset w0, hi
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_slt_ugt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hi
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp slt i32 %s0, %s1
%c1 = icmp ugt i32 %s2, %s3
}
define i32 @and_slt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_slt_uge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, lt
-; CHECK-NEXT: cset w0, hs
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_slt_uge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, lt
+; SDISEL-NEXT: cset w0, hs
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_slt_uge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hs
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp slt i32 %s0, %s1
%c1 = icmp uge i32 %s2, %s3
}
define i32 @and_slt_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_slt_slt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, lt
-; CHECK-NEXT: cset w0, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_slt_slt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, lt
+; SDISEL-NEXT: cset w0, lt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_slt_slt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp slt i32 %s0, %s1
%c1 = icmp slt i32 %s2, %s3
}
define i32 @and_slt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_slt_sle:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, lt
-; CHECK-NEXT: cset w0, le
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_slt_sle:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, lt
+; SDISEL-NEXT: cset w0, le
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_slt_sle:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, le
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp slt i32 %s0, %s1
%c1 = icmp sle i32 %s2, %s3
}
define i32 @and_slt_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_slt_sgt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, lt
-; CHECK-NEXT: cset w0, gt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_slt_sgt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, lt
+; SDISEL-NEXT: cset w0, gt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_slt_sgt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, gt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp slt i32 %s0, %s1
%c1 = icmp sgt i32 %s2, %s3
}
define i32 @and_slt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_slt_sge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #8, lt
-; CHECK-NEXT: cset w0, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_slt_sge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #8, lt
+; SDISEL-NEXT: cset w0, ge
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_slt_sge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, lt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ge
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp slt i32 %s0, %s1
%c1 = icmp sge i32 %s2, %s3
}
define i32 @and_sle_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sle_eq:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, le
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sle_eq:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, le
+; SDISEL-NEXT: cset w0, eq
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sle_eq:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, le
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, eq
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sle i32 %s0, %s1
%c1 = icmp eq i32 %s2, %s3
}
define i32 @and_sle_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sle_ne:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, le
-; CHECK-NEXT: cset w0, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sle_ne:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, le
+; SDISEL-NEXT: cset w0, ne
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sle_ne:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, le
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ne
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sle i32 %s0, %s1
%c1 = icmp ne i32 %s2, %s3
}
define i32 @and_sle_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sle_ult:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, le
-; CHECK-NEXT: cset w0, lo
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sle_ult:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, le
+; SDISEL-NEXT: cset w0, lo
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sle_ult:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, le
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lo
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sle i32 %s0, %s1
%c1 = icmp ult i32 %s2, %s3
}
define i32 @and_sle_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sle_ule:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, le
-; CHECK-NEXT: cset w0, ls
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sle_ule:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, le
+; SDISEL-NEXT: cset w0, ls
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sle_ule:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, le
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ls
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sle i32 %s0, %s1
%c1 = icmp ule i32 %s2, %s3
}
define i32 @and_sle_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sle_ugt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, le
-; CHECK-NEXT: cset w0, hi
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sle_ugt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, le
+; SDISEL-NEXT: cset w0, hi
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sle_ugt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, le
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hi
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sle i32 %s0, %s1
%c1 = icmp ugt i32 %s2, %s3
}
define i32 @and_sle_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sle_uge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, le
-; CHECK-NEXT: cset w0, hs
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sle_uge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, le
+; SDISEL-NEXT: cset w0, hs
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sle_uge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, le
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hs
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sle i32 %s0, %s1
%c1 = icmp uge i32 %s2, %s3
}
define i32 @and_sle_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sle_slt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, le
-; CHECK-NEXT: cset w0, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sle_slt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, le
+; SDISEL-NEXT: cset w0, lt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sle_slt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, le
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sle i32 %s0, %s1
%c1 = icmp slt i32 %s2, %s3
}
define i32 @and_sle_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sle_sle:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, le
-; CHECK-NEXT: cset w0, le
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sle_sle:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, le
+; SDISEL-NEXT: cset w0, le
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sle_sle:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, le
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, le
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sle i32 %s0, %s1
%c1 = icmp sle i32 %s2, %s3
}
define i32 @and_sle_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sle_sgt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, le
-; CHECK-NEXT: cset w0, gt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sle_sgt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, le
+; SDISEL-NEXT: cset w0, gt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sle_sgt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, le
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, gt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sle i32 %s0, %s1
%c1 = icmp sgt i32 %s2, %s3
}
define i32 @and_sle_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sle_sge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #8, le
-; CHECK-NEXT: cset w0, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sle_sge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #8, le
+; SDISEL-NEXT: cset w0, ge
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sle_sge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, le
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ge
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sle i32 %s0, %s1
%c1 = icmp sge i32 %s2, %s3
}
define i32 @and_sgt_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sgt_eq:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, gt
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sgt_eq:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, gt
+; SDISEL-NEXT: cset w0, eq
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sgt_eq:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, gt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, eq
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sgt i32 %s0, %s1
%c1 = icmp eq i32 %s2, %s3
}
define i32 @and_sgt_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sgt_ne:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, gt
-; CHECK-NEXT: cset w0, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sgt_ne:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, gt
+; SDISEL-NEXT: cset w0, ne
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sgt_ne:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, gt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ne
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sgt i32 %s0, %s1
%c1 = icmp ne i32 %s2, %s3
}
define i32 @and_sgt_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sgt_ult:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, gt
-; CHECK-NEXT: cset w0, lo
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sgt_ult:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, gt
+; SDISEL-NEXT: cset w0, lo
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sgt_ult:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, gt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lo
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sgt i32 %s0, %s1
%c1 = icmp ult i32 %s2, %s3
}
define i32 @and_sgt_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sgt_ule:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, gt
-; CHECK-NEXT: cset w0, ls
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sgt_ule:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, gt
+; SDISEL-NEXT: cset w0, ls
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sgt_ule:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, gt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ls
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sgt i32 %s0, %s1
%c1 = icmp ule i32 %s2, %s3
}
define i32 @and_sgt_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sgt_ugt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, gt
-; CHECK-NEXT: cset w0, hi
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sgt_ugt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, gt
+; SDISEL-NEXT: cset w0, hi
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sgt_ugt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, gt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hi
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sgt i32 %s0, %s1
%c1 = icmp ugt i32 %s2, %s3
}
define i32 @and_sgt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sgt_uge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, gt
-; CHECK-NEXT: cset w0, hs
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sgt_uge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, gt
+; SDISEL-NEXT: cset w0, hs
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sgt_uge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, gt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hs
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sgt i32 %s0, %s1
%c1 = icmp uge i32 %s2, %s3
}
define i32 @and_sgt_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sgt_slt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, gt
-; CHECK-NEXT: cset w0, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sgt_slt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, gt
+; SDISEL-NEXT: cset w0, lt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sgt_slt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, gt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sgt i32 %s0, %s1
%c1 = icmp slt i32 %s2, %s3
}
define i32 @and_sgt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sgt_sle:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, gt
-; CHECK-NEXT: cset w0, le
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sgt_sle:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, gt
+; SDISEL-NEXT: cset w0, le
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sgt_sle:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, gt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, le
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sgt i32 %s0, %s1
%c1 = icmp sle i32 %s2, %s3
}
define i32 @and_sgt_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sgt_sgt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, gt
-; CHECK-NEXT: cset w0, gt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sgt_sgt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, gt
+; SDISEL-NEXT: cset w0, gt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sgt_sgt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, gt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, gt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sgt i32 %s0, %s1
%c1 = icmp sgt i32 %s2, %s3
}
define i32 @and_sgt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sgt_sge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #8, gt
-; CHECK-NEXT: cset w0, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sgt_sge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #8, gt
+; SDISEL-NEXT: cset w0, ge
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sgt_sge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, gt
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ge
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sgt i32 %s0, %s1
%c1 = icmp sge i32 %s2, %s3
}
define i32 @and_sge_eq(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sge_eq:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ge
-; CHECK-NEXT: cset w0, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sge_eq:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ge
+; SDISEL-NEXT: cset w0, eq
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sge_eq:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ge
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, eq
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sge i32 %s0, %s1
%c1 = icmp eq i32 %s2, %s3
}
define i32 @and_sge_ne(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sge_ne:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, ge
-; CHECK-NEXT: cset w0, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sge_ne:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, ge
+; SDISEL-NEXT: cset w0, ne
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sge_ne:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ge
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ne
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sge i32 %s0, %s1
%c1 = icmp ne i32 %s2, %s3
}
define i32 @and_sge_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sge_ult:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, ge
-; CHECK-NEXT: cset w0, lo
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sge_ult:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, ge
+; SDISEL-NEXT: cset w0, lo
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sge_ult:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ge
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lo
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sge i32 %s0, %s1
%c1 = icmp ult i32 %s2, %s3
}
define i32 @and_sge_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sge_ule:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #2, ge
-; CHECK-NEXT: cset w0, ls
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sge_ule:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #2, ge
+; SDISEL-NEXT: cset w0, ls
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sge_ule:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ge
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ls
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sge i32 %s0, %s1
%c1 = icmp ule i32 %s2, %s3
}
define i32 @and_sge_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sge_ugt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ge
-; CHECK-NEXT: cset w0, hi
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sge_ugt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ge
+; SDISEL-NEXT: cset w0, hi
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sge_ugt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ge
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hi
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sge i32 %s0, %s1
%c1 = icmp ugt i32 %s2, %s3
}
define i32 @and_sge_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sge_uge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ge
-; CHECK-NEXT: cset w0, hs
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sge_uge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ge
+; SDISEL-NEXT: cset w0, hs
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sge_uge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ge
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, hs
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sge i32 %s0, %s1
%c1 = icmp uge i32 %s2, %s3
}
define i32 @and_sge_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sge_slt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ge
-; CHECK-NEXT: cset w0, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sge_slt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ge
+; SDISEL-NEXT: cset w0, lt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sge_slt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ge
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, lt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sge i32 %s0, %s1
%c1 = icmp slt i32 %s2, %s3
}
define i32 @and_sge_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sge_sle:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #0, ge
-; CHECK-NEXT: cset w0, le
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sge_sle:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #0, ge
+; SDISEL-NEXT: cset w0, le
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sge_sle:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ge
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, le
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sge i32 %s0, %s1
%c1 = icmp sle i32 %s2, %s3
}
define i32 @and_sge_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sge_sgt:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #4, ge
-; CHECK-NEXT: cset w0, gt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sge_sgt:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #4, ge
+; SDISEL-NEXT: cset w0, gt
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sge_sgt:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ge
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, gt
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sge i32 %s0, %s1
%c1 = icmp sgt i32 %s2, %s3
}
define i32 @and_sge_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3) {
-; CHECK-LABEL: and_sge_sge:
-; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: ccmp w2, w3, #8, ge
-; CHECK-NEXT: cset w0, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: and_sge_sge:
+; SDISEL: // %bb.0: // %entry
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: ccmp w2, w3, #8, ge
+; SDISEL-NEXT: cset w0, ge
+; SDISEL-NEXT: ret
+;
+; GISEL-LABEL: and_sge_sge:
+; GISEL: // %bb.0: // %entry
+; GISEL-NEXT: cmp w0, w1
+; GISEL-NEXT: cset w8, ge
+; GISEL-NEXT: cmp w2, w3
+; GISEL-NEXT: cset w9, ge
+; GISEL-NEXT: and w0, w8, w9
+; GISEL-NEXT: ret
entry:
%c0 = icmp sge i32 %s0, %s1
%c1 = icmp sge i32 %s2, %s3
%z = zext i1 %a to i32
ret i32 %z
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -debugify-and-strip-all-safe -mcpu=cyclone -verify-machineinstrs -aarch64-enable-ccmp -aarch64-stress-ccmp | FileCheck %s
-; RUN: llc < %s -debugify-and-strip-all-safe -mcpu=cyclone -verify-machineinstrs -aarch64-enable-ccmp -aarch64-stress-ccmp -global-isel -global-isel-abort=2 | FileCheck %s --check-prefix=GISEL
+; RUN: llc < %s -debugify-and-strip-all-safe -mcpu=cyclone -verify-machineinstrs -aarch64-enable-ccmp -aarch64-stress-ccmp | FileCheck %s --check-prefixes=CHECK,SDISEL
+; RUN: llc < %s -debugify-and-strip-all-safe -mcpu=cyclone -verify-machineinstrs -aarch64-enable-ccmp -aarch64-stress-ccmp -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=CHECK,GISEL
target triple = "arm64-apple-ios"
define i32 @single_same(i32 %a, i32 %b) nounwind ssp {
; CHECK-NEXT: LBB0_2: ; %if.end
; CHECK-NEXT: mov w0, #7
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: single_same:
-; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: cmp w0, #5
-; GISEL-NEXT: ccmp w1, #17, #4, ne
-; GISEL-NEXT: b.ne LBB0_2
-; GISEL-NEXT: ; %bb.1: ; %if.then
-; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
-; GISEL-NEXT: bl _foo
-; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
-; GISEL-NEXT: LBB0_2: ; %if.end
-; GISEL-NEXT: mov w0, #7
-; GISEL-NEXT: ret
entry:
%cmp = icmp eq i32 %a, 5
%cmp1 = icmp eq i32 %b, 17
; Different condition codes for the two compares.
define i32 @single_different(i32 %a, i32 %b) nounwind ssp {
-; CHECK-LABEL: single_different:
-; CHECK: ; %bb.0: ; %entry
-; CHECK-NEXT: cmp w0, #6
-; CHECK-NEXT: ccmp w1, #17, #0, ge
-; CHECK-NEXT: b.eq LBB1_2
-; CHECK-NEXT: ; %bb.1: ; %if.then
-; CHECK-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
-; CHECK-NEXT: bl _foo
-; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
-; CHECK-NEXT: LBB1_2: ; %if.end
-; CHECK-NEXT: mov w0, #7
-; CHECK-NEXT: ret
+; SDISEL-LABEL: single_different:
+; SDISEL: ; %bb.0: ; %entry
+; SDISEL-NEXT: cmp w0, #6
+; SDISEL-NEXT: ccmp w1, #17, #0, ge
+; SDISEL-NEXT: b.eq LBB1_2
+; SDISEL-NEXT: ; %bb.1: ; %if.then
+; SDISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
+; SDISEL-NEXT: bl _foo
+; SDISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
+; SDISEL-NEXT: LBB1_2: ; %if.end
+; SDISEL-NEXT: mov w0, #7
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: single_different:
; GISEL: ; %bb.0: ; %entry
; Second block clobbers the flags, can't convert (easily).
define i32 @single_flagclobber(i32 %a, i32 %b) nounwind ssp {
-; CHECK-LABEL: single_flagclobber:
-; CHECK: ; %bb.0: ; %entry
-; CHECK-NEXT: cmp w0, #5
-; CHECK-NEXT: b.eq LBB2_2
-; CHECK-NEXT: ; %bb.1: ; %lor.lhs.false
-; CHECK-NEXT: lsl w8, w1, #1
-; CHECK-NEXT: cmp w1, #7
-; CHECK-NEXT: csinc w8, w8, w1, lt
-; CHECK-NEXT: cmp w8, #16
-; CHECK-NEXT: b.gt LBB2_3
-; CHECK-NEXT: LBB2_2: ; %if.then
-; CHECK-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
-; CHECK-NEXT: bl _foo
-; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
-; CHECK-NEXT: LBB2_3: ; %if.end
-; CHECK-NEXT: mov w0, #7
-; CHECK-NEXT: ret
+; SDISEL-LABEL: single_flagclobber:
+; SDISEL: ; %bb.0: ; %entry
+; SDISEL-NEXT: cmp w0, #5
+; SDISEL-NEXT: b.eq LBB2_2
+; SDISEL-NEXT: ; %bb.1: ; %lor.lhs.false
+; SDISEL-NEXT: lsl w8, w1, #1
+; SDISEL-NEXT: cmp w1, #7
+; SDISEL-NEXT: csinc w8, w8, w1, lt
+; SDISEL-NEXT: cmp w8, #16
+; SDISEL-NEXT: b.gt LBB2_3
+; SDISEL-NEXT: LBB2_2: ; %if.then
+; SDISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
+; SDISEL-NEXT: bl _foo
+; SDISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
+; SDISEL-NEXT: LBB2_3: ; %if.end
+; SDISEL-NEXT: mov w0, #7
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: single_flagclobber:
; GISEL: ; %bb.0: ; %entry
; CHECK-NEXT: LBB3_3: ; %if.end
; CHECK-NEXT: mov w0, #7
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: single_flagclobber_tbz:
-; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: cmp w0, #5
-; GISEL-NEXT: b.eq LBB3_2
-; GISEL-NEXT: ; %bb.1: ; %lor.lhs.false
-; GISEL-NEXT: lsl w8, w1, #1
-; GISEL-NEXT: cmp w1, #7
-; GISEL-NEXT: csinc w8, w8, w1, lt
-; GISEL-NEXT: tbz w8, #3, LBB3_3
-; GISEL-NEXT: LBB3_2: ; %if.then
-; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
-; GISEL-NEXT: bl _foo
-; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
-; GISEL-NEXT: LBB3_3: ; %if.end
-; GISEL-NEXT: mov w0, #7
-; GISEL-NEXT: ret
entry:
%cmp = icmp eq i32 %a, 5
br i1 %cmp, label %if.then, label %lor.lhs.false
; The sdiv/udiv instructions do not trap when the divisor is zero, so they are
; safe to speculate.
define i32 @speculate_division(i32 %a, i32 %b) nounwind ssp {
-; CHECK-LABEL: speculate_division:
-; CHECK: ; %bb.0: ; %entry
-; CHECK-NEXT: cmp w0, #1
-; CHECK-NEXT: sdiv w8, w1, w0
-; CHECK-NEXT: ccmp w8, #16, #0, ge
-; CHECK-NEXT: b.le LBB4_2
-; CHECK-NEXT: ; %bb.1: ; %if.end
-; CHECK-NEXT: mov w0, #7
-; CHECK-NEXT: ret
-; CHECK-NEXT: LBB4_2: ; %if.then
-; CHECK-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
-; CHECK-NEXT: bl _foo
-; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
-; CHECK-NEXT: mov w0, #7
-; CHECK-NEXT: ret
+; SDISEL-LABEL: speculate_division:
+; SDISEL: ; %bb.0: ; %entry
+; SDISEL-NEXT: cmp w0, #1
+; SDISEL-NEXT: sdiv w8, w1, w0
+; SDISEL-NEXT: ccmp w8, #16, #0, ge
+; SDISEL-NEXT: b.le LBB4_2
+; SDISEL-NEXT: ; %bb.1: ; %if.end
+; SDISEL-NEXT: mov w0, #7
+; SDISEL-NEXT: ret
+; SDISEL-NEXT: LBB4_2: ; %if.then
+; SDISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
+; SDISEL-NEXT: bl _foo
+; SDISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
+; SDISEL-NEXT: mov w0, #7
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: speculate_division:
; GISEL: ; %bb.0: ; %entry
; Floating point compare.
define i32 @single_fcmp(i32 %a, float %b) nounwind ssp {
-; CHECK-LABEL: single_fcmp:
-; CHECK: ; %bb.0: ; %entry
-; CHECK-NEXT: cmp w0, #1
-; CHECK-NEXT: scvtf s1, w0
-; CHECK-NEXT: fdiv s0, s0, s1
-; CHECK-NEXT: fmov s1, #17.00000000
-; CHECK-NEXT: fccmp s0, s1, #8, ge
-; CHECK-NEXT: b.ge LBB5_2
-; CHECK-NEXT: ; %bb.1: ; %if.end
-; CHECK-NEXT: mov w0, #7
-; CHECK-NEXT: ret
-; CHECK-NEXT: LBB5_2: ; %if.then
-; CHECK-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
-; CHECK-NEXT: bl _foo
-; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
-; CHECK-NEXT: mov w0, #7
-; CHECK-NEXT: ret
+; SDISEL-LABEL: single_fcmp:
+; SDISEL: ; %bb.0: ; %entry
+; SDISEL-NEXT: cmp w0, #1
+; SDISEL-NEXT: scvtf s1, w0
+; SDISEL-NEXT: fdiv s0, s0, s1
+; SDISEL-NEXT: fmov s1, #17.00000000
+; SDISEL-NEXT: fccmp s0, s1, #8, ge
+; SDISEL-NEXT: b.ge LBB5_2
+; SDISEL-NEXT: ; %bb.1: ; %if.end
+; SDISEL-NEXT: mov w0, #7
+; SDISEL-NEXT: ret
+; SDISEL-NEXT: LBB5_2: ; %if.then
+; SDISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
+; SDISEL-NEXT: bl _foo
+; SDISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
+; SDISEL-NEXT: mov w0, #7
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: single_fcmp:
; GISEL: ; %bb.0: ; %entry
; CHECK-NEXT: ret
; CHECK-NEXT: LBB6_2: ; %if.then
; CHECK-NEXT: b _foo
-;
-; GISEL-LABEL: multi_different:
-; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: cmp w0, w1
-; GISEL-NEXT: sdiv w8, w1, w0
-; GISEL-NEXT: ccmp w8, #5, #0, gt
-; GISEL-NEXT: ccmp w8, w2, #4, eq
-; GISEL-NEXT: b.gt LBB6_2
-; GISEL-NEXT: ; %bb.1: ; %if.end
-; GISEL-NEXT: ret
-; GISEL-NEXT: LBB6_2: ; %if.then
-; GISEL-NEXT: b _foo
entry:
%cmp = icmp sgt i32 %a, %b
br i1 %cmp, label %land.lhs.true, label %if.end
; CHECK-NEXT: LBB7_2: ; %if.end
; CHECK-NEXT: mov w0, #7
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cbz_head:
-; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: cmp w0, #0
-; GISEL-NEXT: ccmp w1, #17, #0, ne
-; GISEL-NEXT: b.eq LBB7_2
-; GISEL-NEXT: ; %bb.1: ; %if.then
-; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
-; GISEL-NEXT: bl _foo
-; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
-; GISEL-NEXT: LBB7_2: ; %if.end
-; GISEL-NEXT: mov w0, #7
-; GISEL-NEXT: ret
entry:
%cmp = icmp eq i32 %a, 0
%cmp1 = icmp ne i32 %b, 17
; CHECK-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
; CHECK-NEXT: mov w0, #7
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: immediate_range:
-; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: cmp w0, #5
-; GISEL-NEXT: b.eq LBB8_3
-; GISEL-NEXT: ; %bb.1: ; %entry
-; GISEL-NEXT: cmp w1, #32
-; GISEL-NEXT: b.eq LBB8_3
-; GISEL-NEXT: ; %bb.2: ; %if.end
-; GISEL-NEXT: mov w0, #7
-; GISEL-NEXT: ret
-; GISEL-NEXT: LBB8_3: ; %if.then
-; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
-; GISEL-NEXT: bl _foo
-; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
-; GISEL-NEXT: mov w0, #7
-; GISEL-NEXT: ret
entry:
%cmp = icmp eq i32 %a, 5
%cmp1 = icmp eq i32 %b, 32
; CHECK-NEXT: LBB9_2: ; %if.end
; CHECK-NEXT: mov w0, #7
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cbz_second:
-; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: cmp w0, #0
-; GISEL-NEXT: ccmp w1, #0, #0, ne
-; GISEL-NEXT: b.eq LBB9_2
-; GISEL-NEXT: ; %bb.1: ; %if.then
-; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
-; GISEL-NEXT: bl _foo
-; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
-; GISEL-NEXT: LBB9_2: ; %if.end
-; GISEL-NEXT: mov w0, #7
-; GISEL-NEXT: ret
entry:
%cmp = icmp eq i32 %a, 0
%cmp1 = icmp ne i32 %b, 0
; CHECK-NEXT: LBB10_2: ; %if.end
; CHECK-NEXT: mov w0, #7
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: cbnz_second:
-; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: cmp w0, #0
-; GISEL-NEXT: ccmp w1, #0, #4, ne
-; GISEL-NEXT: b.ne LBB10_2
-; GISEL-NEXT: ; %bb.1: ; %if.then
-; GISEL-NEXT: stp x29, x30, [sp, #-16]! ; 16-byte Folded Spill
-; GISEL-NEXT: bl _foo
-; GISEL-NEXT: ldp x29, x30, [sp], #16 ; 16-byte Folded Reload
-; GISEL-NEXT: LBB10_2: ; %if.end
-; GISEL-NEXT: mov w0, #7
-; GISEL-NEXT: ret
entry:
%cmp = icmp eq i32 %a, 0
%cmp1 = icmp eq i32 %b, 0
; CHECK-LABEL: build_modify_expr:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: build_modify_expr:
-; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ret
entry:
switch i32 undef, label %sw.bb.i.i [
i32 69, label %if.end85
}
define i64 @select_and(i32 %w0, i32 %w1, i64 %x2, i64 %x3) {
-; CHECK-LABEL: select_and:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp w1, #5
-; CHECK-NEXT: ccmp w0, w1, #0, ne
-; CHECK-NEXT: csel x0, x2, x3, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: select_and:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp w1, #5
+; SDISEL-NEXT: ccmp w0, w1, #0, ne
+; SDISEL-NEXT: csel x0, x2, x3, lt
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: select_and:
; GISEL: ; %bb.0:
}
define i64 @select_or(i32 %w0, i32 %w1, i64 %x2, i64 %x3) {
-; CHECK-LABEL: select_or:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp w1, #5
-; CHECK-NEXT: ccmp w0, w1, #8, eq
-; CHECK-NEXT: csel x0, x2, x3, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: select_or:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp w1, #5
+; SDISEL-NEXT: ccmp w0, w1, #8, eq
+; SDISEL-NEXT: csel x0, x2, x3, lt
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: select_or:
; GISEL: ; %bb.0:
}
define float @select_or_float(i32 %w0, i32 %w1, float %x2, float %x3) {
-; CHECK-LABEL: select_or_float:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp w1, #5
-; CHECK-NEXT: ccmp w0, w1, #8, eq
-; CHECK-NEXT: fcsel s0, s0, s1, lt
-; CHECK-NEXT: ret
+; SDISEL-LABEL: select_or_float:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp w1, #5
+; SDISEL-NEXT: ccmp w0, w1, #8, eq
+; SDISEL-NEXT: fcsel s0, s0, s1, lt
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: select_or_float:
; GISEL: ; %bb.0:
}
define i64 @gccbug(i64 %x0, i64 %x1) {
-; CHECK-LABEL: gccbug:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp x0, #2
-; CHECK-NEXT: ccmp x0, #4, #4, ne
-; CHECK-NEXT: ccmp x1, #0, #0, eq
-; CHECK-NEXT: mov w8, #1
-; CHECK-NEXT: cinc x0, x8, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: gccbug:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp x0, #2
+; SDISEL-NEXT: ccmp x0, #4, #4, ne
+; SDISEL-NEXT: ccmp x1, #0, #0, eq
+; SDISEL-NEXT: mov w8, #1
+; SDISEL-NEXT: cinc x0, x8, eq
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: gccbug:
; GISEL: ; %bb.0:
}
define i32 @select_ororand(i32 %w0, i32 %w1, i32 %w2, i32 %w3) {
-; CHECK-LABEL: select_ororand:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp w3, #4
-; CHECK-NEXT: ccmp w2, #2, #0, gt
-; CHECK-NEXT: ccmp w1, #13, #2, ge
-; CHECK-NEXT: ccmp w0, #0, #4, ls
-; CHECK-NEXT: csel w0, w3, wzr, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: select_ororand:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp w3, #4
+; SDISEL-NEXT: ccmp w2, #2, #0, gt
+; SDISEL-NEXT: ccmp w1, #13, #2, ge
+; SDISEL-NEXT: ccmp w0, #0, #4, ls
+; SDISEL-NEXT: csel w0, w3, wzr, eq
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: select_ororand:
; GISEL: ; %bb.0:
}
define i32 @select_andor(i32 %v1, i32 %v2, i32 %v3) {
-; CHECK-LABEL: select_andor:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp w1, w2
-; CHECK-NEXT: ccmp w0, #0, #4, lt
-; CHECK-NEXT: ccmp w0, w1, #0, eq
-; CHECK-NEXT: csel w0, w0, w1, eq
-; CHECK-NEXT: ret
+; SDISEL-LABEL: select_andor:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp w1, w2
+; SDISEL-NEXT: ccmp w0, #0, #4, lt
+; SDISEL-NEXT: ccmp w0, w1, #0, eq
+; SDISEL-NEXT: csel w0, w0, w1, eq
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: select_andor:
; GISEL: ; %bb.0:
}
define i64 @select_noccmp1(i64 %v1, i64 %v2, i64 %v3, i64 %r) {
-; CHECK-LABEL: select_noccmp1:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp x0, #0
-; CHECK-NEXT: ccmp x0, #13, #4, lt
-; CHECK-NEXT: cset w8, gt
-; CHECK-NEXT: cmp x2, #2
-; CHECK-NEXT: ccmp x2, #4, #4, lt
-; CHECK-NEXT: cset w9, gt
-; CHECK-NEXT: orr w8, w8, w9
-; CHECK-NEXT: cmp w8, #0
-; CHECK-NEXT: csel x0, xzr, x3, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: select_noccmp1:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp x0, #0
+; SDISEL-NEXT: ccmp x0, #13, #4, lt
+; SDISEL-NEXT: cset w8, gt
+; SDISEL-NEXT: cmp x2, #2
+; SDISEL-NEXT: ccmp x2, #4, #4, lt
+; SDISEL-NEXT: cset w9, gt
+; SDISEL-NEXT: orr w8, w8, w9
+; SDISEL-NEXT: cmp w8, #0
+; SDISEL-NEXT: csel x0, xzr, x3, ne
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: select_noccmp1:
; GISEL: ; %bb.0:
@g = global i32 0
define i64 @select_noccmp2(i64 %v1, i64 %v2, i64 %v3, i64 %r) {
-; CHECK-LABEL: select_noccmp2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp x0, #0
-; CHECK-NEXT: ccmp x0, #13, #0, ge
-; CHECK-NEXT: cset w8, gt
-; CHECK-NEXT: cmp w8, #0
-; CHECK-NEXT: csel x0, xzr, x3, ne
-; CHECK-NEXT: sbfx w8, w8, #0, #1
-; CHECK-NEXT: adrp x9, _g@PAGE
-; CHECK-NEXT: str w8, [x9, _g@PAGEOFF]
-; CHECK-NEXT: ret
+; SDISEL-LABEL: select_noccmp2:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp x0, #0
+; SDISEL-NEXT: ccmp x0, #13, #0, ge
+; SDISEL-NEXT: cset w8, gt
+; SDISEL-NEXT: cmp w8, #0
+; SDISEL-NEXT: csel x0, xzr, x3, ne
+; SDISEL-NEXT: sbfx w8, w8, #0, #1
+; SDISEL-NEXT: adrp x9, _g@PAGE
+; SDISEL-NEXT: str w8, [x9, _g@PAGEOFF]
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: select_noccmp2:
; GISEL: ; %bb.0:
; The following is not possible to implement with a single cmp;ccmp;csel
; sequence.
define i32 @select_noccmp3(i32 %v0, i32 %v1, i32 %v2) {
-; CHECK-LABEL: select_noccmp3:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp w0, #0
-; CHECK-NEXT: ccmp w0, #13, #0, ge
-; CHECK-NEXT: cset w8, gt
-; CHECK-NEXT: cmp w0, #22
-; CHECK-NEXT: mov w9, #44
-; CHECK-NEXT: ccmp w0, w9, #0, ge
-; CHECK-NEXT: cset w9, gt
-; CHECK-NEXT: cmp w0, #99
-; CHECK-NEXT: and w8, w8, w9
-; CHECK-NEXT: mov w9, #77
-; CHECK-NEXT: ccmp w0, w9, #4, ne
-; CHECK-NEXT: cset w9, eq
-; CHECK-NEXT: tst w8, w9
-; CHECK-NEXT: csel w0, w1, w2, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: select_noccmp3:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp w0, #0
+; SDISEL-NEXT: ccmp w0, #13, #0, ge
+; SDISEL-NEXT: cset w8, gt
+; SDISEL-NEXT: cmp w0, #22
+; SDISEL-NEXT: mov w9, #44
+; SDISEL-NEXT: ccmp w0, w9, #0, ge
+; SDISEL-NEXT: cset w9, gt
+; SDISEL-NEXT: cmp w0, #99
+; SDISEL-NEXT: and w8, w8, w9
+; SDISEL-NEXT: mov w9, #77
+; SDISEL-NEXT: ccmp w0, w9, #4, ne
+; SDISEL-NEXT: cset w9, eq
+; SDISEL-NEXT: tst w8, w9
+; SDISEL-NEXT: csel w0, w1, w2, ne
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: select_noccmp3:
; GISEL: ; %bb.0:
; CHECK-NEXT: fccmp d2, d3, #1, ne
; CHECK-NEXT: csel w0, w0, w1, vc
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: select_and_olt_one:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: fcmp d0, d1
-; GISEL-NEXT: fccmp d2, d3, #4, mi
-; GISEL-NEXT: fccmp d2, d3, #1, ne
-; GISEL-NEXT: csel w0, w0, w1, vc
-; GISEL-NEXT: ret
%c0 = fcmp olt double %v0, %v1
%c1 = fcmp one double %v2, %v3
%cr = and i1 %c1, %c0
; CHECK-NEXT: fccmp d2, d3, #0, vc
; CHECK-NEXT: csel w0, w0, w1, mi
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: select_and_one_olt:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: fcmp d0, d1
-; GISEL-NEXT: fccmp d0, d1, #1, ne
-; GISEL-NEXT: fccmp d2, d3, #0, vc
-; GISEL-NEXT: csel w0, w0, w1, mi
-; GISEL-NEXT: ret
%c0 = fcmp one double %v0, %v1
%c1 = fcmp olt double %v2, %v3
%cr = and i1 %c1, %c0
; CHECK-NEXT: fccmp d2, d3, #8, le
; CHECK-NEXT: csel w0, w0, w1, pl
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: select_and_olt_ueq:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: fcmp d0, d1
-; GISEL-NEXT: fccmp d2, d3, #0, mi
-; GISEL-NEXT: fccmp d2, d3, #8, le
-; GISEL-NEXT: csel w0, w0, w1, pl
-; GISEL-NEXT: ret
%c0 = fcmp olt double %v0, %v1
%c1 = fcmp ueq double %v2, %v3
%cr = and i1 %c1, %c0
; CHECK-NEXT: fccmp d2, d3, #0, pl
; CHECK-NEXT: csel w0, w0, w1, mi
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: select_and_ueq_olt:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: fcmp d0, d1
-; GISEL-NEXT: fccmp d0, d1, #8, le
-; GISEL-NEXT: fccmp d2, d3, #0, pl
-; GISEL-NEXT: csel w0, w0, w1, mi
-; GISEL-NEXT: ret
%c0 = fcmp ueq double %v0, %v1
%c1 = fcmp olt double %v2, %v3
%cr = and i1 %c1, %c0
; CHECK-NEXT: fccmp d2, d3, #8, le
; CHECK-NEXT: csel w0, w0, w1, mi
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: select_or_olt_one:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: fcmp d0, d1
-; GISEL-NEXT: fccmp d2, d3, #0, pl
-; GISEL-NEXT: fccmp d2, d3, #8, le
-; GISEL-NEXT: csel w0, w0, w1, mi
-; GISEL-NEXT: ret
%c0 = fcmp olt double %v0, %v1
%c1 = fcmp one double %v2, %v3
%cr = or i1 %c1, %c0
; CHECK-NEXT: fccmp d2, d3, #8, pl
; CHECK-NEXT: csel w0, w0, w1, mi
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: select_or_one_olt:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: fcmp d0, d1
-; GISEL-NEXT: fccmp d0, d1, #8, le
-; GISEL-NEXT: fccmp d2, d3, #8, pl
-; GISEL-NEXT: csel w0, w0, w1, mi
-; GISEL-NEXT: ret
%c0 = fcmp one double %v0, %v1
%c1 = fcmp olt double %v2, %v3
%cr = or i1 %c1, %c0
; CHECK-NEXT: fccmp d2, d3, #1, ne
; CHECK-NEXT: csel w0, w0, w1, vs
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: select_or_olt_ueq:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: fcmp d0, d1
-; GISEL-NEXT: fccmp d2, d3, #4, pl
-; GISEL-NEXT: fccmp d2, d3, #1, ne
-; GISEL-NEXT: csel w0, w0, w1, vs
-; GISEL-NEXT: ret
%c0 = fcmp olt double %v0, %v1
%c1 = fcmp ueq double %v2, %v3
%cr = or i1 %c1, %c0
; CHECK-NEXT: fccmp d2, d3, #8, vc
; CHECK-NEXT: csel w0, w0, w1, mi
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: select_or_ueq_olt:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: fcmp d0, d1
-; GISEL-NEXT: fccmp d0, d1, #1, ne
-; GISEL-NEXT: fccmp d2, d3, #8, vc
-; GISEL-NEXT: csel w0, w0, w1, mi
-; GISEL-NEXT: ret
%c0 = fcmp ueq double %v0, %v1
%c1 = fcmp olt double %v2, %v3
%cr = or i1 %c1, %c0
; CHECK-NEXT: fccmp d4, d5, #1, ne
; CHECK-NEXT: csel w0, w0, w1, vs
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: select_or_olt_ogt_ueq:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: fcmp d0, d1
-; GISEL-NEXT: fccmp d2, d3, #0, pl
-; GISEL-NEXT: fccmp d4, d5, #4, le
-; GISEL-NEXT: fccmp d4, d5, #1, ne
-; GISEL-NEXT: csel w0, w0, w1, vs
-; GISEL-NEXT: ret
%c0 = fcmp olt double %v0, %v1
%c1 = fcmp ogt double %v2, %v3
%c2 = fcmp ueq double %v4, %v5
; CHECK-NEXT: fccmp d4, d5, #0, vc
; CHECK-NEXT: csel w0, w0, w1, gt
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: select_or_olt_ueq_ogt:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: fcmp d0, d1
-; GISEL-NEXT: fccmp d2, d3, #4, pl
-; GISEL-NEXT: fccmp d2, d3, #1, ne
-; GISEL-NEXT: fccmp d4, d5, #0, vc
-; GISEL-NEXT: csel w0, w0, w1, gt
-; GISEL-NEXT: ret
%c0 = fcmp olt double %v0, %v1
%c1 = fcmp ueq double %v2, %v3
%c2 = fcmp ogt double %v4, %v5
; Verify that we correctly promote f16.
define i32 @half_select_and_olt_oge(half %v0, half %v1, half %v2, half %v3, i32 %a, i32 %b) #0 {
-; CHECK-LABEL: half_select_and_olt_oge:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: fcvt s1, h1
-; CHECK-NEXT: fcvt s0, h0
-; CHECK-NEXT: fcmp s0, s1
-; CHECK-NEXT: fcvt s0, h3
-; CHECK-NEXT: fcvt s1, h2
-; CHECK-NEXT: fccmp s1, s0, #8, mi
-; CHECK-NEXT: csel w0, w0, w1, ge
-; CHECK-NEXT: ret
+; SDISEL-LABEL: half_select_and_olt_oge:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: fcvt s1, h1
+; SDISEL-NEXT: fcvt s0, h0
+; SDISEL-NEXT: fcmp s0, s1
+; SDISEL-NEXT: fcvt s0, h3
+; SDISEL-NEXT: fcvt s1, h2
+; SDISEL-NEXT: fccmp s1, s0, #8, mi
+; SDISEL-NEXT: csel w0, w0, w1, ge
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: half_select_and_olt_oge:
; GISEL: ; %bb.0:
}
define i32 @half_select_and_olt_one(half %v0, half %v1, half %v2, half %v3, i32 %a, i32 %b) #0 {
-; CHECK-LABEL: half_select_and_olt_one:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: fcvt s1, h1
-; CHECK-NEXT: fcvt s0, h0
-; CHECK-NEXT: fcmp s0, s1
-; CHECK-NEXT: fcvt s0, h3
-; CHECK-NEXT: fcvt s1, h2
-; CHECK-NEXT: fccmp s1, s0, #4, mi
-; CHECK-NEXT: fccmp s1, s0, #1, ne
-; CHECK-NEXT: csel w0, w0, w1, vc
-; CHECK-NEXT: ret
+; SDISEL-LABEL: half_select_and_olt_one:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: fcvt s1, h1
+; SDISEL-NEXT: fcvt s0, h0
+; SDISEL-NEXT: fcmp s0, s1
+; SDISEL-NEXT: fcvt s0, h3
+; SDISEL-NEXT: fcvt s1, h2
+; SDISEL-NEXT: fccmp s1, s0, #4, mi
+; SDISEL-NEXT: fccmp s1, s0, #1, ne
+; SDISEL-NEXT: csel w0, w0, w1, vc
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: half_select_and_olt_one:
; GISEL: ; %bb.0:
; CHECK-NEXT: ldp x22, x21, [sp, #32] ; 16-byte Folded Reload
; CHECK-NEXT: add sp, sp, #80
; CHECK-NEXT: ret
-;
-; GISEL-LABEL: f128_select_and_olt_oge:
-; GISEL: ; %bb.0:
-; GISEL-NEXT: sub sp, sp, #80
-; GISEL-NEXT: stp x22, x21, [sp, #32] ; 16-byte Folded Spill
-; GISEL-NEXT: stp x20, x19, [sp, #48] ; 16-byte Folded Spill
-; GISEL-NEXT: stp x29, x30, [sp, #64] ; 16-byte Folded Spill
-; GISEL-NEXT: mov x19, x1
-; GISEL-NEXT: mov x20, x0
-; GISEL-NEXT: stp q2, q3, [sp] ; 32-byte Folded Spill
-; GISEL-NEXT: bl ___lttf2
-; GISEL-NEXT: cmp w0, #0
-; GISEL-NEXT: cset w21, lt
-; GISEL-NEXT: ldp q0, q1, [sp] ; 32-byte Folded Reload
-; GISEL-NEXT: bl ___getf2
-; GISEL-NEXT: cmp w0, #0
-; GISEL-NEXT: cset w8, ge
-; GISEL-NEXT: tst w8, w21
-; GISEL-NEXT: csel w0, w20, w19, ne
-; GISEL-NEXT: ldp x29, x30, [sp, #64] ; 16-byte Folded Reload
-; GISEL-NEXT: ldp x20, x19, [sp, #48] ; 16-byte Folded Reload
-; GISEL-NEXT: ldp x22, x21, [sp, #32] ; 16-byte Folded Reload
-; GISEL-NEXT: add sp, sp, #80
-; GISEL-NEXT: ret
%c0 = fcmp olt fp128 %v0, %v1
%c1 = fcmp oge fp128 %v2, %v3
%cr = and i1 %c1, %c0
; This testcase resembles the core problem of http://llvm.org/PR39550
; (an OR operation is 2 levels deep but needs to be implemented first)
define i32 @deep_or(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) {
-; CHECK-LABEL: deep_or:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp w2, #20
-; CHECK-NEXT: ccmp w2, #15, #4, ne
-; CHECK-NEXT: ccmp w1, #0, #4, eq
-; CHECK-NEXT: ccmp w0, #0, #4, ne
-; CHECK-NEXT: csel w0, w4, w5, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: deep_or:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp w2, #20
+; SDISEL-NEXT: ccmp w2, #15, #4, ne
+; SDISEL-NEXT: ccmp w1, #0, #4, eq
+; SDISEL-NEXT: ccmp w0, #0, #4, ne
+; SDISEL-NEXT: csel w0, w4, w5, ne
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: deep_or:
; GISEL: ; %bb.0:
; Variation of deep_or, we still need to implement the OR first though.
define i32 @deep_or1(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) {
-; CHECK-LABEL: deep_or1:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp w2, #20
-; CHECK-NEXT: ccmp w2, #15, #4, ne
-; CHECK-NEXT: ccmp w0, #0, #4, eq
-; CHECK-NEXT: ccmp w1, #0, #4, ne
-; CHECK-NEXT: csel w0, w4, w5, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: deep_or1:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp w2, #20
+; SDISEL-NEXT: ccmp w2, #15, #4, ne
+; SDISEL-NEXT: ccmp w0, #0, #4, eq
+; SDISEL-NEXT: ccmp w1, #0, #4, ne
+; SDISEL-NEXT: csel w0, w4, w5, ne
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: deep_or1:
; GISEL: ; %bb.0:
; Variation of deep_or, we still need to implement the OR first though.
define i32 @deep_or2(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %x, i32 %y) {
-; CHECK-LABEL: deep_or2:
-; CHECK: ; %bb.0:
-; CHECK-NEXT: cmp w2, #20
-; CHECK-NEXT: ccmp w2, #15, #4, ne
-; CHECK-NEXT: ccmp w1, #0, #4, eq
-; CHECK-NEXT: ccmp w0, #0, #4, ne
-; CHECK-NEXT: csel w0, w4, w5, ne
-; CHECK-NEXT: ret
+; SDISEL-LABEL: deep_or2:
+; SDISEL: ; %bb.0:
+; SDISEL-NEXT: cmp w2, #20
+; SDISEL-NEXT: ccmp w2, #15, #4, ne
+; SDISEL-NEXT: ccmp w1, #0, #4, eq
+; SDISEL-NEXT: ccmp w0, #0, #4, ne
+; SDISEL-NEXT: csel w0, w4, w5, ne
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: deep_or2:
; GISEL: ; %bb.0:
; This test is trying to test that multiple ccmp's don't get created in a way
; that they would have multiple uses. It doesn't seem to.
define i32 @multiccmp(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %x, i32 %y) #0 {
-; CHECK-LABEL: multiccmp:
-; CHECK: ; %bb.0: ; %entry
-; CHECK-NEXT: stp x22, x21, [sp, #-48]! ; 16-byte Folded Spill
-; CHECK-NEXT: stp x20, x19, [sp, #16] ; 16-byte Folded Spill
-; CHECK-NEXT: stp x29, x30, [sp, #32] ; 16-byte Folded Spill
-; CHECK-NEXT: mov x19, x5
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: cset w20, gt
-; CHECK-NEXT: cmp w2, w3
-; CHECK-NEXT: cset w21, ne
-; CHECK-NEXT: tst w20, w21
-; CHECK-NEXT: csel w0, w5, w4, ne
-; CHECK-NEXT: bl _callee
-; CHECK-NEXT: tst w20, w21
-; CHECK-NEXT: csel w0, w0, w19, ne
-; CHECK-NEXT: bl _callee
-; CHECK-NEXT: ldp x29, x30, [sp, #32] ; 16-byte Folded Reload
-; CHECK-NEXT: ldp x20, x19, [sp, #16] ; 16-byte Folded Reload
-; CHECK-NEXT: ldp x22, x21, [sp], #48 ; 16-byte Folded Reload
-; CHECK-NEXT: ret
+; SDISEL-LABEL: multiccmp:
+; SDISEL: ; %bb.0: ; %entry
+; SDISEL-NEXT: stp x22, x21, [sp, #-48]! ; 16-byte Folded Spill
+; SDISEL-NEXT: stp x20, x19, [sp, #16] ; 16-byte Folded Spill
+; SDISEL-NEXT: stp x29, x30, [sp, #32] ; 16-byte Folded Spill
+; SDISEL-NEXT: mov x19, x5
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: cset w20, gt
+; SDISEL-NEXT: cmp w2, w3
+; SDISEL-NEXT: cset w21, ne
+; SDISEL-NEXT: tst w20, w21
+; SDISEL-NEXT: csel w0, w5, w4, ne
+; SDISEL-NEXT: bl _callee
+; SDISEL-NEXT: tst w20, w21
+; SDISEL-NEXT: csel w0, w0, w19, ne
+; SDISEL-NEXT: bl _callee
+; SDISEL-NEXT: ldp x29, x30, [sp, #32] ; 16-byte Folded Reload
+; SDISEL-NEXT: ldp x20, x19, [sp, #16] ; 16-byte Folded Reload
+; SDISEL-NEXT: ldp x22, x21, [sp], #48 ; 16-byte Folded Reload
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: multiccmp:
; GISEL: ; %bb.0: ; %entry
}
define i32 @multiccmp2(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %x, i32 %y) #0 {
-; CHECK-LABEL: multiccmp2:
-; CHECK: ; %bb.0: ; %entry
-; CHECK-NEXT: stp x22, x21, [sp, #-48]! ; 16-byte Folded Spill
-; CHECK-NEXT: stp x20, x19, [sp, #16] ; 16-byte Folded Spill
-; CHECK-NEXT: stp x29, x30, [sp, #32] ; 16-byte Folded Spill
-; CHECK-NEXT: mov x19, x5
-; CHECK-NEXT: mov x20, x3
-; CHECK-NEXT: mov x21, x0
-; CHECK-NEXT: cmp w0, w1
-; CHECK-NEXT: cset w8, gt
-; CHECK-NEXT: cmp w2, w3
-; CHECK-NEXT: cset w22, ne
-; CHECK-NEXT: tst w8, w22
-; CHECK-NEXT: csel w0, w5, w4, ne
-; CHECK-NEXT: bl _callee
-; CHECK-NEXT: cmp w21, w20
-; CHECK-NEXT: cset w8, eq
-; CHECK-NEXT: tst w22, w8
-; CHECK-NEXT: csel w0, w0, w19, ne
-; CHECK-NEXT: bl _callee
-; CHECK-NEXT: ldp x29, x30, [sp, #32] ; 16-byte Folded Reload
-; CHECK-NEXT: ldp x20, x19, [sp, #16] ; 16-byte Folded Reload
-; CHECK-NEXT: ldp x22, x21, [sp], #48 ; 16-byte Folded Reload
-; CHECK-NEXT: ret
+; SDISEL-LABEL: multiccmp2:
+; SDISEL: ; %bb.0: ; %entry
+; SDISEL-NEXT: stp x22, x21, [sp, #-48]! ; 16-byte Folded Spill
+; SDISEL-NEXT: stp x20, x19, [sp, #16] ; 16-byte Folded Spill
+; SDISEL-NEXT: stp x29, x30, [sp, #32] ; 16-byte Folded Spill
+; SDISEL-NEXT: mov x19, x5
+; SDISEL-NEXT: mov x20, x3
+; SDISEL-NEXT: mov x21, x0
+; SDISEL-NEXT: cmp w0, w1
+; SDISEL-NEXT: cset w8, gt
+; SDISEL-NEXT: cmp w2, w3
+; SDISEL-NEXT: cset w22, ne
+; SDISEL-NEXT: tst w8, w22
+; SDISEL-NEXT: csel w0, w5, w4, ne
+; SDISEL-NEXT: bl _callee
+; SDISEL-NEXT: cmp w21, w20
+; SDISEL-NEXT: cset w8, eq
+; SDISEL-NEXT: tst w22, w8
+; SDISEL-NEXT: csel w0, w0, w19, ne
+; SDISEL-NEXT: bl _callee
+; SDISEL-NEXT: ldp x29, x30, [sp, #32] ; 16-byte Folded Reload
+; SDISEL-NEXT: ldp x20, x19, [sp, #16] ; 16-byte Folded Reload
+; SDISEL-NEXT: ldp x22, x21, [sp], #48 ; 16-byte Folded Reload
+; SDISEL-NEXT: ret
;
; GISEL-LABEL: multiccmp2:
; GISEL: ; %bb.0: ; %entry