usb: dwc2: Add core parameters for LPM support
authorSevak Arakelyan <sevaka@synopsys.com>
Wed, 24 Jan 2018 13:41:48 +0000 (17:41 +0400)
committerFelipe Balbi <felipe.balbi@linux.intel.com>
Tue, 13 Mar 2018 08:47:47 +0000 (10:47 +0200)
Add lpm, lpm_clock_gating, besl, hird_threshold_en and hird_threshold
core parameters. These will indicate LPM and LPM Errata support
as well as chosen L1 sleeping mode for the core and PHY.

Signed-off-by: Sevak Arakelyan <sevaka@synopsys.com>
Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
drivers/usb/dwc2/core.h
drivers/usb/dwc2/debugfs.c
drivers/usb/dwc2/params.c

index f6daa58..bd6672b 100644 (file)
@@ -427,6 +427,19 @@ enum dwc2_ep0_state {
  *                     needed.
  *                     0 - No (default)
  *                     1 - Yes
+ * @lpm:               Enable LPM support.
+ *                     0 - No
+ *                     1 - Yes
+ * @lpm_clock_gating:          Enable core PHY clock gating.
+ *                     0 - No
+ *                     1 - Yes
+ * @besl:              Enable LPM Errata support.
+ *                     0 - No
+ *                     1 - Yes
+ * @hird_threshold_en: HIRD or HIRD Threshold enable.
+ *                     0 - No
+ *                     1 - Yes
+ * @hird_threshold:    Value of BESL or HIRD Threshold.
  * @activate_stm_fs_transceiver: Activate internal transceiver using GGPIO
  *                     register.
  *                     0 - Deactivate the transceiver (default)
@@ -486,6 +499,11 @@ struct dwc2_core_params {
        bool uframe_sched;
        bool external_id_pin_ctl;
        bool hibernation;
+       bool lpm;
+       bool lpm_clock_gating;
+       bool besl;
+       bool hird_threshold_en;
+       u8 hird_threshold;
        bool activate_stm_fs_transceiver;
        u16 max_packet_count;
        u32 max_transfer_size;
@@ -595,6 +613,7 @@ struct dwc2_hw_params {
        unsigned total_fifo_size:16;
        unsigned power_optimized:1;
        unsigned utmi_phy_data_width:2;
+       unsigned lpm_mode:1;
        u32 snpsid;
        u32 dev_ep_dirs;
        u32 g_tx_fifo_size[MAX_EPS_CHANNELS];
@@ -950,6 +969,7 @@ struct dwc2_hsotg {
 
        /* DWC OTG HW Release versions */
 #define DWC2_CORE_REV_2_71a    0x4f54271a
+#define DWC2_CORE_REV_2_80a    0x4f54280a
 #define DWC2_CORE_REV_2_90a    0x4f54290a
 #define DWC2_CORE_REV_2_91a    0x4f54291a
 #define DWC2_CORE_REV_2_92a    0x4f54292a
index 5e0d7f2..c475ac5 100644 (file)
@@ -719,6 +719,11 @@ static int params_show(struct seq_file *seq, void *v)
        print_param(seq, p, uframe_sched);
        print_param(seq, p, external_id_pin_ctl);
        print_param(seq, p, hibernation);
+       print_param(seq, p, lpm);
+       print_param(seq, p, lpm_clock_gating);
+       print_param(seq, p, besl);
+       print_param(seq, p, hird_threshold_en);
+       print_param(seq, p, hird_threshold);
        print_param(seq, p, host_dma);
        print_param(seq, p, g_dma);
        print_param(seq, p, g_dma_desc);
index f0f877c..827f7f8 100644 (file)
@@ -279,6 +279,11 @@ static void dwc2_set_default_params(struct dwc2_hsotg *hsotg)
        p->uframe_sched = true;
        p->external_id_pin_ctl = false;
        p->hibernation = false;
+       p->lpm = true;
+       p->lpm_clock_gating = true;
+       p->besl = true;
+       p->hird_threshold_en = true;
+       p->hird_threshold = 4;
        p->max_packet_count = hw->max_packet_count;
        p->max_transfer_size = hw->max_transfer_size;
        p->ahbcfg = GAHBCFG_HBSTLEN_INCR << GAHBCFG_HBSTLEN_SHIFT;
@@ -529,6 +534,13 @@ static void dwc2_check_params(struct dwc2_hsotg *hsotg)
        CHECK_BOOL(i2c_enable, hw->i2c_enable);
        CHECK_BOOL(acg_enable, hw->acg_enable);
        CHECK_BOOL(reload_ctl, (hsotg->hw_params.snpsid > DWC2_CORE_REV_2_92a));
+       CHECK_BOOL(lpm, (hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_80a));
+       CHECK_BOOL(lpm, hw->lpm_mode);
+       CHECK_BOOL(lpm_clock_gating, hsotg->params.lpm);
+       CHECK_BOOL(besl, hsotg->params.lpm);
+       CHECK_BOOL(besl, (hsotg->hw_params.snpsid >= DWC2_CORE_REV_3_00a));
+       CHECK_BOOL(hird_threshold_en, hsotg->params.lpm);
+       CHECK_RANGE(hird_threshold, 0, hsotg->params.besl ? 12 : 7, 0);
        CHECK_RANGE(max_packet_count,
                    15, hw->max_packet_count,
                    hw->max_packet_count);
@@ -707,6 +719,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
        hw->i2c_enable = !!(hwcfg3 & GHWCFG3_I2C);
        hw->total_fifo_size = (hwcfg3 & GHWCFG3_DFIFO_DEPTH_MASK) >>
                              GHWCFG3_DFIFO_DEPTH_SHIFT;
+       hw->lpm_mode = !!(hwcfg3 & GHWCFG3_OTG_LPM_EN);
 
        /* hwcfg4 */
        hw->en_multiple_tx_fifo = !!(hwcfg4 & GHWCFG4_DED_FIFO_EN);