[InstCombine] add tests for logical-and / logical-or folds; NFC

Similar to 29661fe94bf12ced1 - there are matching
deficiencies and a potential crash lurking in
these patterns.

diff --git a/llvm/test/Transforms/InstCombine/select-safe-transforms.ll b/llvm/test/Transforms/InstCombine/select-safe-transforms.ll
index dba5993..d34193b 100644 (file)
--- a/llvm/test/Transforms/InstCombine/select-safe-transforms.ll
+++ b/llvm/test/Transforms/InstCombine/select-safe-transforms.ll
@@ -695,6 +695,23 @@ define i1 @orn_and_cmp_1_partial_logical(i37 %a, i37 %b, i1 %y) {
 ;
   %x = icmp sgt i37 %a, %b
   %x_inv = icmp sle i37 %a, %b
+  %and = and i1 %x, %y
+  %or = select i1 %x_inv, i1 true, i1 %and
+  ret i1 %or
+}
+
+define i1 @orn_and_cmp_1_partial_logical_commute(i37 %a, i37 %b) {
+; CHECK-LABEL: @orn_and_cmp_1_partial_logical_commute(
+; CHECK-NEXT:    [[Y:%.*]] = call i1 @gen1()
+; CHECK-NEXT:    [[X:%.*]] = icmp sgt i37 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[X_INV:%.*]] = icmp sle i37 [[A]], [[B]]
+; CHECK-NEXT:    [[AND:%.*]] = and i1 [[Y]], [[X]]
+; CHECK-NEXT:    [[OR:%.*]] = select i1 [[X_INV]], i1 true, i1 [[AND]]
+; CHECK-NEXT:    ret i1 [[OR]]
+;
+  %y = call i1 @gen1() ; thwart complexity-based canonicalization
+  %x = icmp sgt i37 %a, %b
+  %x_inv = icmp sle i37 %a, %b
   %and = and i1 %y, %x
   %or = select i1 %x_inv, i1 true, i1 %and
   ret i1 %or
@@ -723,7 +740,35 @@ define i1 @orn_and_cmp_2_partial_logical(i16 %a, i16 %b, i1 %y) {
 ;
   %x = icmp sge i16 %a, %b
   %x_inv = icmp slt i16 %a, %b
+  %and = and i1 %x, %y
+  %or = select i1 %and, i1 true, i1 %x_inv
+  ret i1 %or
+}
+
+define i1 @orn_and_cmp_2_partial_logical_commute(i16 %a, i16 %b) {
+; CHECK-LABEL: @orn_and_cmp_2_partial_logical_commute(
+; CHECK-NEXT:    [[Y:%.*]] = call i1 @gen1()
+; CHECK-NEXT:    [[X_INV:%.*]] = icmp slt i16 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[OR:%.*]] = or i1 [[Y]], [[X_INV]]
+; CHECK-NEXT:    ret i1 [[OR]]
+;
+  %y = call i1 @gen1() ; thwart complexity-based canonicalization
+  %x = icmp sge i16 %a, %b
+  %x_inv = icmp slt i16 %a, %b
   %and = and i1 %y, %x
   %or = select i1 %and, i1 true, i1 %x_inv
   ret i1 %or
 }
+
+define <2 x i1> @not_logical_and2(i1 %b, <2 x i32> %a) {
+; CHECK-LABEL: @not_logical_and2(
+; CHECK-NEXT:    [[IMPLIED:%.*]] = icmp ugt <2 x i32> [[A:%.*]], <i32 1, i32 1>
+; CHECK-NEXT:    [[OR:%.*]] = select i1 [[B:%.*]], <2 x i1> <i1 true, i1 true>, <2 x i1> [[IMPLIED]]
+; CHECK-NEXT:    ret <2 x i1> [[OR]]
+;
+  %cond = icmp ult <2 x i32> %a, <i32 3, i32 3>
+  %implied = icmp ugt <2 x i32> %a, <i32 1, i32 1>
+  %and = select i1 %b, <2 x i1> %cond, <2 x i1> zeroinitializer
+  %or = select <2 x i1> %and, <2 x i1> <i1 true, i1 true>, <2 x i1> %implied
+  ret <2 x i1> %or
+}